[Beignet] [PATCH 1/2] Support non-16 multiple group size.

[Zhigang Gong]

Pushed with minor fix. Thanks.

On Fri, May 31, 2013 at 03:58:08PM +0800, Ruiling Song wrote:
> Signed-off-by: Ruiling Song <ruiling.song at intel.com>
> ---
>  src/cl_command_queue_gen7.c |    2 +-
>  src/cl_kernel.c             |    2 +-
>  src/intel/intel_gpgpu.c     |   12 ++++++++++--
>  3 files changed, 12 insertions(+), 4 deletions(-)
> 
> diff --git a/src/cl_command_queue_gen7.c b/src/cl_command_queue_gen7.c
> index 770af4a..435bf9c 100644
> --- a/src/cl_command_queue_gen7.c
> +++ b/src/cl_command_queue_gen7.c
> @@ -209,7 +209,7 @@ cl_command_queue_ND_range_gen7(cl_command_queue queue,
>  
>    /* Compute the number of HW threads we need */
>    TRY (cl_kernel_work_group_sz, ker, local_wk_sz, 3, &local_sz);
> -  kernel.thread_n = thread_n = local_sz / simd_sz;
> +  kernel.thread_n = thread_n = (ALIGN(local_sz, simd_sz)) / simd_sz;
>    kernel.cst_sz = cst_sz;
>  
>    /* Curbe step 1: fill the constant buffer data shared by all threads */
> diff --git a/src/cl_kernel.c b/src/cl_kernel.c
> index 90aa0c2..851acfa 100644
> --- a/src/cl_kernel.c
> +++ b/src/cl_kernel.c
> @@ -292,7 +292,7 @@ cl_kernel_work_group_sz(cl_kernel ker,
>    sz = local_wk_sz[0];
>    for (i = 1; i < wk_dim; ++i)
>      sz *= local_wk_sz[i];
> -  FATAL_IF (sz % 16, "Work group size must be a multiple of 16");
> +
>    if (sz > ker->program->ctx->device->max_work_group_size) {
>      err = CL_INVALID_WORK_ITEM_SIZE;
>      goto error;
> diff --git a/src/intel/intel_gpgpu.c b/src/intel/intel_gpgpu.c
> index b0f556d..2af3883 100644
> --- a/src/intel/intel_gpgpu.c
> +++ b/src/intel/intel_gpgpu.c
> @@ -748,7 +748,15 @@ intel_gpgpu_walker(intel_gpgpu_t *gpgpu,
>      global_wk_sz[1] / local_wk_sz[1],
>      global_wk_sz[2] / local_wk_sz[2]
>    };
> +  uint32_t right_mask = ~0x0;
> +  size_t group_sz = local_wk_sz[0] * local_wk_sz[1] * local_wk_sz[2];
> +
>    assert(simd_sz == 8 || simd_sz == 16);
> +
> +  uint32_t shift = (group_sz & (simd_sz - 1));
> +  shift = (shift == 0) ? simd_sz : shift;
> +  right_mask = (1 << shift) - 1;
> +
>    BEGIN_BATCH(gpgpu->batch, 11);
>    OUT_BATCH(gpgpu->batch, CMD_GPGPU_WALKER | 9);
>    OUT_BATCH(gpgpu->batch, 0);                        /* kernel index == 0 */
> @@ -762,8 +770,8 @@ intel_gpgpu_walker(intel_gpgpu_t *gpgpu,
>    OUT_BATCH(gpgpu->batch, global_wk_dim[1]);
>    OUT_BATCH(gpgpu->batch, global_wk_off[2]);
>    OUT_BATCH(gpgpu->batch, global_wk_dim[2]);
> -  OUT_BATCH(gpgpu->batch, ~0x0);
> -  OUT_BATCH(gpgpu->batch, ~0x0);
> +  OUT_BATCH(gpgpu->batch, right_mask);
> +  OUT_BATCH(gpgpu->batch, ~0x0);                     /* we always set height as zero, so set bottom mask as all F*/
>    ADVANCE_BATCH(gpgpu->batch);
>  
>    BEGIN_BATCH(gpgpu->batch, 2);
> -- 
> 1.7.9.5
> 
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