[Beignet] [PATCH V2 2/5] Add Gen instruction 'else'

[Yongjia Zhang]

Add Gen instruction 'else' for future use.

Signed-off-by: Yongjia Zhang <yongjia.zhang at intel.com>
---
 backend/src/backend/gen_encoder.cpp        |  6 +++++-
 backend/src/backend/gen_encoder.hpp        |  2 ++
 backend/src/backend/gen_insn_selection.cpp | 19 ++++++++++++++++---
 backend/src/backend/gen_insn_selection.hxx |  1 +
 4 files changed, 24 insertions(+), 4 deletions(-)

diff --git a/backend/src/backend/gen_encoder.cpp b/backend/src/backend/gen_encoder.cpp
index 26337e9..f910714 100644
--- a/backend/src/backend/gen_encoder.cpp
+++ b/backend/src/backend/gen_encoder.cpp
@@ -1024,6 +1024,7 @@ namespace gbe
   }
 
   ALU2_BRA(IF)
+  ALU2_BRA(ELSE)
   ALU2_BRA(ENDIF)
   ALU2_BRA(BRD)
   ALU2_BRA(BRC)
@@ -1035,7 +1036,8 @@ namespace gbe
                insn.header.opcode == GEN_OPCODE_BRD  ||
                insn.header.opcode == GEN_OPCODE_ENDIF ||
                insn.header.opcode == GEN_OPCODE_IF ||
-               insn.header.opcode == GEN_OPCODE_BRC);
+               insn.header.opcode == GEN_OPCODE_BRC ||
+               insn.header.opcode == GEN_OPCODE_ELSE);
 
     if (insn.header.opcode != GEN_OPCODE_JMPI || (jumpDistance > -32769 && jumpDistance < 32768))  {
            if (insn.header.opcode == GEN_OPCODE_IF) {
@@ -1045,6 +1047,8 @@ namespace gbe
            else if (insn.header.opcode == GEN_OPCODE_JMPI) {
              jumpDistance = jumpDistance - 2;
            }
+           else if(insn.header.opcode == GEN_OPCODE_ENDIF)
+             jumpDistance += 2;
 
            this->setSrc1(&insn, GenRegister::immd(jumpDistance));
     } else if ( insn.header.predicate_control == GEN_PREDICATE_NONE ) {
diff --git a/backend/src/backend/gen_encoder.hpp b/backend/src/backend/gen_encoder.hpp
index eb2d3d7..0c9c925 100644
--- a/backend/src/backend/gen_encoder.hpp
+++ b/backend/src/backend/gen_encoder.hpp
@@ -150,6 +150,8 @@ namespace gbe
     virtual void JMPI(GenRegister src, bool longjmp = false);
     /*! IF indexed instruction */
     void IF(GenRegister src);
+    /*! ELSE indexed instruction */
+    void ELSE(GenRegister src);
     /*! ENDIF indexed instruction */
     void ENDIF(GenRegister src);
     /*! BRC indexed instruction */
diff --git a/backend/src/backend/gen_insn_selection.cpp b/backend/src/backend/gen_insn_selection.cpp
index fb041de..7022d3b 100644
--- a/backend/src/backend/gen_insn_selection.cpp
+++ b/backend/src/backend/gen_insn_selection.cpp
@@ -539,8 +539,10 @@ namespace gbe
     int JMPI(Reg src, ir::LabelIndex target, ir::LabelIndex origin);
     /*! IF indexed instruction */
     void IF(Reg src, ir::LabelIndex jip, ir::LabelIndex uip);
+    /*! ELSE indexed instruction */
+    void ELSE(Reg src, ir::LabelIndex jip, ir::LabelIndex elseLabel);
     /*! ENDIF indexed instruction */
-    void ENDIF(Reg src, ir::LabelIndex jip);
+    void ENDIF(Reg src, ir::LabelIndex jip, ir::LabelIndex endifLabel = ir::LabelIndex(0));
     /*! BRD indexed instruction */
     void BRD(Reg src, ir::LabelIndex jip);
     /*! BRC indexed instruction */
@@ -1041,8 +1043,19 @@ namespace gbe
     insn->index1 = uint16_t(uip);
   }
 
-  void Selection::Opaque::ENDIF(Reg src, ir::LabelIndex jip) {
-    this->block->endifLabel = this->newAuxLabel();
+  void Selection::Opaque::ELSE(Reg src, ir::LabelIndex jip, ir::LabelIndex elseLabel) {
+
+    SelectionInstruction *insn = this->appendInsn(SEL_OP_ELSE, 0, 1);
+    insn->src(0) = src;
+    insn->index = uint16_t(jip);
+    this->LABEL(elseLabel);
+  }
+
+  void Selection::Opaque::ENDIF(Reg src, ir::LabelIndex jip, ir::LabelIndex endifLabel) {
+    if(endifLabel == 0)
+      this->block->endifLabel = this->newAuxLabel();
+    else
+      this->block->endifLabel = endifLabel;
     this->LABEL(this->block->endifLabel);
     SelectionInstruction *insn = this->appendInsn(SEL_OP_ENDIF, 0, 1);
     insn->src(0) = src;
diff --git a/backend/src/backend/gen_insn_selection.hxx b/backend/src/backend/gen_insn_selection.hxx
index ddc9d5e..2d70982 100644
--- a/backend/src/backend/gen_insn_selection.hxx
+++ b/backend/src/backend/gen_insn_selection.hxx
@@ -84,3 +84,4 @@ DECL_SELECTION_IR(BRC, UnaryInstruction)
 DECL_SELECTION_IR(BRD, UnaryInstruction)
 DECL_SELECTION_IR(IF, UnaryInstruction)
 DECL_SELECTION_IR(ENDIF, UnaryInstruction)
+DECL_SELECTION_IR(ELSE, UnaryInstruction)
-- 
1.8.3.2