[Beignet] [PATCH 2/5] HSW: add data port 1 support in disasseble.

[Yang, Rong R]

-----Original Message-----
From: Zhigang Gong [mailto:zhigang.gong at linux.intel.com] 
Sent: Wednesday, June 04, 2014 10:50 AM
To: Yang, Rong R
Cc: beignet at lists.freedesktop.org
Subject: Re: [Beignet] [PATCH 2/5] HSW: add data port 1 support in disasseble.

On Wed, Jun 04, 2014 at 02:30:28AM +0000, Yang, Rong R wrote:
> 
> 
> -----Original Message-----
> From: Beignet [mailto:beignet-bounces at lists.freedesktop.org] On Behalf 
> Of Zhigang Gong
> Sent: Friday, May 30, 2014 9:14 AM
> To: Yang, Rong R
> Cc: beignet at lists.freedesktop.org
> Subject: Re: [Beignet] [PATCH 2/5] HSW: add data port 1 support in disasseble.
> 
> On Fri, May 30, 2014 at 12:37:31AM +0800, Yang Rong wrote:
> > HSW add new data port, add support in diassemble.
> > 
> > Signed-off-by: Yang Rong <rong.r.yang at intel.com>
> > ---
> >  backend/src/backend/gen/gen_mesa_disasm.c | 26
> > +++++++++++++++++++++++++-
> >  1 file changed, 25 insertions(+), 1 deletion(-)
> > 
> > diff --git a/backend/src/backend/gen/gen_mesa_disasm.c
> > b/backend/src/backend/gen/gen_mesa_disasm.c
> > index 81c33a6..c8f7b99 100644
> > --- a/backend/src/backend/gen/gen_mesa_disasm.c
> > +++ b/backend/src/backend/gen/gen_mesa_disasm.c
> > @@ -316,7 +316,8 @@ static const char *target_function_gen6[16] = {
> >    [GEN6_SFID_DATAPORT_SAMPLER_CACHE] = "sampler",
> >    [GEN6_SFID_DATAPORT_RENDER_CACHE] = "render",
> >    [GEN6_SFID_DATAPORT_CONSTANT_CACHE] = "const",
> > -  [GEN_SFID_DATAPORT_DATA_CACHE] = "data"
> > +  [GEN_SFID_DATAPORT_DATA_CACHE] = "data", 
> > + [GEN_SFID_DATAPORT1_DATA_CACHE] = "data"
> Shall we give the dataport1 a different name? Or the HSW will always use dataport1?
> The other part just LGTM.
> 
> >>>>HSW also use dataport, for example "Byte Scattered" is dataport msg, and "Untyped Surface Read" is dataport1 msg, but I think we needn't care which data port when read asm.
IMO, if there is no special reason, let's keep the disassembly output fully comply with the spec.
Or at least, let's keep align with the simulator. You may double check the output of the simulator's asm view.

>>>Simulator used Data Cluster(0) and Data Cluster(1) to distinct, I will distinguish them in HSW.


> >  };
> >  
> >  static const char *gateway_sub_function[8] = { @@ -414,6 +415,21 @@ 
> > static const char *data_port_data_cache_msg_type[] = {
> >    [13] = "Untyped Surface Write",
> >  };
> >  
> > +static const char *data_port1_data_cache_msg_type[] = {
> > +  [1] = "Untyped Surface Read",
> > +  [2] = "Untyped Atomic Operation",
> > +  [3] = "Untyped Atomic Operation SIMD4x2",
> > +  [4] = "Media Block Read",
> > +  [5] = "Typed Surface Read",
> > +  [6] = "Typed Atomic Operation",
> > +  [7] = "Typed Atomic Operation SIMD4x2",
> > +  [9] = "Untyped Surface Write",
> > +  [10] = "Media Block Write",
> > +  [11] = "Atomic Counter Operation",
> > +  [12] = "Atomic Counter Operation 4X2",
> > +  [13] = "Typed Surface Write",
> > +};
> > +
> >  static int column;
> >  
> >  static int string (FILE *file, const char *string) @@ -1199,6
> > +1215,14 @@ int gen_disasm (FILE *file, const void *opaque_insn)
> >                    data_port_scratch_msg_type[inst->bits3.gen7_scratch_rw.msg_type]);
> >          }
> >          break;
> > +      case GEN_SFID_DATAPORT1_DATA_CACHE:
> > +        format (file, " (bti: %d, rgba: %d, %s, %s, %s)",
> > +                inst->bits3.gen7_untyped_rw.bti,
> > +                inst->bits3.gen7_untyped_rw.rgba,
> > +                data_port_data_cache_simd_mode[inst->bits3.gen7_untyped_rw.simd_mode],
> > +                data_port_data_cache_category[inst->bits3.gen7_untyped_rw.category],
> > +                data_port1_data_cache_msg_type[inst->bits3.gen7_untyped_rw.msg_type]);
> > +        break;
> >        case GEN6_SFID_DATAPORT_CONSTANT_CACHE:
> >          format (file, " (bti: %d, %s)",
> >                  inst->bits3.gen7_dword_rw.bti,
> > --
> > 1.8.3.2
> > 
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