[Beignet] [PATCH] Set proper Vendor ID
Midhun Kodiyath
midhunchandra.kodiyath at intel.com
Mon Aug 10 08:34:48 PDT 2015
Device ID and vendor ID are not same.Set the correct vendor ID.
Signed-off-by: Midhun Kodiyath <midhunchandra.kodiyath at intel.com>
---
src/cl_device_data.h | 1 +
src/cl_device_id.c | 28 ++++++++++++++--------------
src/cl_device_id.h | 1 +
src/cl_gt_device.h | 3 ++-
src/cl_program.c | 16 ++++++++--------
src/intel/intel_driver.c | 8 ++++----
6 files changed, 30 insertions(+), 27 deletions(-)
diff --git a/src/cl_device_data.h b/src/cl_device_data.h
index 600ed6b..3552a16 100644
--- a/src/cl_device_data.h
+++ b/src/cl_device_data.h
@@ -21,6 +21,7 @@
#define __CL_DEVICE_DATA_H__
#define INVALID_CHIP_ID -1 //returned by intel_get_device_id if no device found
+#define INTEL_VENDOR_ID 0x8086 // Vendor ID for Intel
#define PCI_CHIP_GM45_GM 0x2A42
#define PCI_CHIP_IGD_E_G 0x2E02
diff --git a/src/cl_device_id.c b/src/cl_device_id.c
index 940e31c..1778292 100644
--- a/src/cl_device_id.c
+++ b/src/cl_device_id.c
@@ -350,7 +350,7 @@ cl_get_gt_device(void)
case PCI_CHIP_HASWELL_CRW_E3:
DECL_INFO_STRING(has_break, intel_hsw_gt3_device, name, "Intel(R) HD Graphics Haswell CRW GT3 reserved");
has_break:
- device->vendor_id = device_id;
+ device->device_id = device_id;
device->platform = cl_get_platform_default();
ret = device;
cl_intel_platform_get_default_extension(ret);
@@ -363,7 +363,7 @@ has_break:
case PCI_CHIP_IVYBRIDGE_S_GT1:
DECL_INFO_STRING(ivb_gt1_break, intel_ivb_gt1_device, name, "Intel(R) HD Graphics IvyBridge S GT1");
ivb_gt1_break:
- intel_ivb_gt1_device.vendor_id = device_id;
+ intel_ivb_gt1_device.device_id = device_id;
intel_ivb_gt1_device.platform = cl_get_platform_default();
ret = &intel_ivb_gt1_device;
cl_intel_platform_get_default_extension(ret);
@@ -376,7 +376,7 @@ ivb_gt1_break:
case PCI_CHIP_IVYBRIDGE_S_GT2:
DECL_INFO_STRING(ivb_gt2_break, intel_ivb_gt2_device, name, "Intel(R) HD Graphics IvyBridge S GT2");
ivb_gt2_break:
- intel_ivb_gt2_device.vendor_id = device_id;
+ intel_ivb_gt2_device.device_id = device_id;
intel_ivb_gt2_device.platform = cl_get_platform_default();
ret = &intel_ivb_gt2_device;
cl_intel_platform_get_default_extension(ret);
@@ -385,7 +385,7 @@ ivb_gt2_break:
case PCI_CHIP_BAYTRAIL_T:
DECL_INFO_STRING(baytrail_t_device_break, intel_baytrail_t_device, name, "Intel(R) HD Graphics Bay Trail-T");
baytrail_t_device_break:
- intel_baytrail_t_device.vendor_id = device_id;
+ intel_baytrail_t_device.device_id = device_id;
intel_baytrail_t_device.platform = cl_get_platform_default();
ret = &intel_baytrail_t_device;
cl_intel_platform_get_default_extension(ret);
@@ -403,7 +403,7 @@ baytrail_t_device_break:
DECL_INFO_STRING(brw_gt1_break, intel_brw_gt1_device, name, "Intel(R) HD Graphics BroadWell ULX GT1");
brw_gt1_break:
/* For Gen8 and later, half float is suppported and we will enable cl_khr_fp16. */
- intel_brw_gt1_device.vendor_id = device_id;
+ intel_brw_gt1_device.device_id = device_id;
intel_brw_gt1_device.platform = cl_get_platform_default();
ret = &intel_brw_gt1_device;
cl_intel_platform_enable_fp16_extension(ret);
@@ -420,7 +420,7 @@ brw_gt1_break:
case PCI_CHIP_BROADWLL_U_GT2:
DECL_INFO_STRING(brw_gt2_break, intel_brw_gt2_device, name, "Intel(R) HD Graphics 5300 BroadWell ULX GT2");
brw_gt2_break:
- intel_brw_gt2_device.vendor_id = device_id;
+ intel_brw_gt2_device.device_id = device_id;
intel_brw_gt2_device.platform = cl_get_platform_default();
ret = &intel_brw_gt2_device;
cl_intel_platform_enable_fp16_extension(ret);
@@ -439,7 +439,7 @@ brw_gt2_break:
case PCI_CHIP_BROADWLL_U_GT3:
DECL_INFO_STRING(brw_gt3_break, intel_brw_gt3_device, name, "Intel(R) HD Graphics BroadWell ULX GT3");
brw_gt3_break:
- intel_brw_gt3_device.vendor_id = device_id;
+ intel_brw_gt3_device.device_id = device_id;
intel_brw_gt3_device.platform = cl_get_platform_default();
ret = &intel_brw_gt3_device;
cl_intel_platform_enable_fp16_extension(ret);
@@ -451,7 +451,7 @@ brw_gt3_break:
case PCI_CHIP_CHV_3:
DECL_INFO_STRING(chv_break, intel_chv_device, name, "Intel(R) HD Graphics Cherryview");
chv_break:
- intel_chv_device.vendor_id = device_id;
+ intel_chv_device.device_id = device_id;
intel_chv_device.platform = cl_get_platform_default();
ret = &intel_chv_device;
cl_intel_platform_enable_fp16_extension(ret);
@@ -469,7 +469,7 @@ chv_break:
case PCI_CHIP_SKYLAKE_SRV_GT1:
DECL_INFO_STRING(skl_gt1_break, intel_skl_gt1_device, name, "Intel(R) HD Graphics Skylake Server GT1");
skl_gt1_break:
- intel_skl_gt1_device.vendor_id = device_id;
+ intel_skl_gt1_device.device_id = device_id;
intel_skl_gt1_device.platform = cl_get_platform_default();
ret = &intel_skl_gt1_device;
cl_intel_platform_enable_fp16_extension(ret);
@@ -488,7 +488,7 @@ skl_gt1_break:
case PCI_CHIP_SKYLAKE_SRV_GT2:
DECL_INFO_STRING(skl_gt2_break, intel_skl_gt2_device, name, "Intel(R) HD Graphics Skylake Server GT2");
skl_gt2_break:
- intel_skl_gt2_device.vendor_id = device_id;
+ intel_skl_gt2_device.device_id = device_id;
intel_skl_gt2_device.platform = cl_get_platform_default();
ret = &intel_skl_gt2_device;
cl_intel_platform_enable_fp16_extension(ret);
@@ -501,7 +501,7 @@ skl_gt2_break:
case PCI_CHIP_SKYLAKE_SRV_GT3:
DECL_INFO_STRING(skl_gt3_break, intel_skl_gt3_device, name, "Intel(R) HD Graphics Skylake Server GT3");
skl_gt3_break:
- intel_skl_gt3_device.vendor_id = device_id;
+ intel_skl_gt3_device.device_id = device_id;
intel_skl_gt3_device.platform = cl_get_platform_default();
ret = &intel_skl_gt3_device;
cl_intel_platform_enable_fp16_extension(ret);
@@ -512,7 +512,7 @@ skl_gt3_break:
case PCI_CHIP_SKYLAKE_SRV_GT4:
DECL_INFO_STRING(skl_gt4_break, intel_skl_gt4_device, name, "Intel(R) HD Graphics Skylake Server GT4");
skl_gt4_break:
- intel_skl_gt4_device.vendor_id = device_id;
+ intel_skl_gt4_device.device_id = device_id;
intel_skl_gt4_device.platform = cl_get_platform_default();
ret = &intel_skl_gt4_device;
cl_intel_platform_enable_fp16_extension(ret);
@@ -903,9 +903,9 @@ cl_get_kernel_max_wg_sz(cl_kernel kernel)
{
size_t work_group_size, thread_cnt;
int simd_width = interp_kernel_get_simd_width(kernel->opaque);
- int vendor_id = kernel->program->ctx->device->vendor_id;
+ int device_id = kernel->program->ctx->device->device_id;
if (!interp_kernel_use_slm(kernel->opaque)) {
- if (!IS_BAYTRAIL_T(vendor_id) || simd_width == 16)
+ if (!IS_BAYTRAIL_T(device_id) || simd_width == 16)
work_group_size = simd_width * 64;
else
work_group_size = kernel->program->ctx->device->max_compute_unit *
diff --git a/src/cl_device_id.h b/src/cl_device_id.h
index 6daa31c..b5db91c 100644
--- a/src/cl_device_id.h
+++ b/src/cl_device_id.h
@@ -24,6 +24,7 @@
struct _cl_device_id {
DEFINE_ICD(dispatch)
cl_device_type device_type;
+ cl_uint device_id;
cl_uint vendor_id;
cl_uint max_compute_unit; // maximum EU number
cl_uint max_thread_per_unit; // maximum EU threads per EU.
diff --git a/src/cl_gt_device.h b/src/cl_gt_device.h
index 4b43c20..bd87cc4 100644
--- a/src/cl_gt_device.h
+++ b/src/cl_gt_device.h
@@ -19,7 +19,8 @@
/* Common fields for both all GT devices (IVB / SNB) */
.device_type = CL_DEVICE_TYPE_GPU,
-.vendor_id = 0, /* == device_id (set when requested) */
+.device_id=0,/* == device_id (set when requested) */
+.vendor_id = INTEL_VENDOR_ID,
.max_work_item_dimensions = 3,
.max_1d_global_work_sizes = {1024 * 1024 * 256, 1, 1},
.max_2d_global_work_sizes = {8192, 8192, 1},
diff --git a/src/cl_program.c b/src/cl_program.c
index db53757..0fffc83 100644
--- a/src/cl_program.c
+++ b/src/cl_program.c
@@ -237,7 +237,7 @@ cl_program_create_from_binary(cl_context ctx,
TRY_ALLOC(typed_binary, cl_calloc(lengths[0]+1, sizeof(char)));
memcpy(typed_binary+1, binaries[0], lengths[0]);
*typed_binary = 1;
- program->opaque = compiler_program_new_from_llvm_binary(program->ctx->device->vendor_id, typed_binary, program->binary_sz+1);
+ program->opaque = compiler_program_new_from_llvm_binary(program->ctx->device->device_id, typed_binary, program->binary_sz+1);
cl_free(typed_binary);
if (UNLIKELY(program->opaque == NULL)) {
err = CL_INVALID_PROGRAM;
@@ -254,7 +254,7 @@ cl_program_create_from_binary(cl_context ctx,
err= CL_INVALID_BINARY;
goto error;
}
- program->opaque = compiler_program_new_from_llvm_binary(program->ctx->device->vendor_id, program->binary, program->binary_sz);
+ program->opaque = compiler_program_new_from_llvm_binary(program->ctx->device->device_id, program->binary, program->binary_sz);
if (UNLIKELY(program->opaque == NULL)) {
err = CL_INVALID_PROGRAM;
@@ -263,7 +263,7 @@ cl_program_create_from_binary(cl_context ctx,
program->source_type = FROM_LLVM;
}
else if (*program->binary == 0) {
- program->opaque = interp_program_new_from_binary(program->ctx->device->vendor_id, program->binary, program->binary_sz);
+ program->opaque = interp_program_new_from_binary(program->ctx->device->device_id, program->binary, program->binary_sz);
if (UNLIKELY(program->opaque == NULL)) {
err = CL_INVALID_PROGRAM;
goto error;
@@ -379,7 +379,7 @@ cl_program_create_from_llvm(cl_context ctx,
INVALID_VALUE_IF (file_name == NULL);
program = cl_program_new(ctx);
- program->opaque = compiler_program_new_from_llvm(ctx->device->vendor_id, file_name, NULL, NULL, program->build_log_max_sz, program->build_log, &program->build_log_sz, 1);
+ program->opaque = compiler_program_new_from_llvm(ctx->device->device_id, file_name, NULL, NULL, program->build_log_max_sz, program->build_log, &program->build_log_sz, 1);
if (UNLIKELY(program->opaque == NULL)) {
err = CL_INVALID_PROGRAM;
goto error;
@@ -532,7 +532,7 @@ cl_program_build(cl_program p, const char *options)
goto error;
}
- p->opaque = compiler_program_new_from_source(p->ctx->device->vendor_id, p->source, p->build_log_max_sz, options, p->build_log, &p->build_log_sz);
+ p->opaque = compiler_program_new_from_source(p->ctx->device->device_id, p->source, p->build_log_max_sz, options, p->build_log, &p->build_log_sz);
if (UNLIKELY(p->opaque == NULL)) {
if (p->build_log_sz > 0 && strstr(p->build_log, "error: error reading 'options'"))
err = CL_INVALID_BUILD_OPTIONS;
@@ -560,7 +560,7 @@ cl_program_build(cl_program p, const char *options)
/* Create all the kernels */
TRY (cl_program_load_gen_program, p);
} else if (p->source_type == FROM_BINARY) {
- p->opaque = interp_program_new_from_binary(p->ctx->device->vendor_id, p->binary, p->binary_sz);
+ p->opaque = interp_program_new_from_binary(p->ctx->device->device_id, p->binary, p->binary_sz);
if (UNLIKELY(p->opaque == NULL)) {
err = CL_BUILD_PROGRAM_FAILURE;
goto error;
@@ -611,7 +611,7 @@ cl_program_link(cl_context context,
goto error;
}
- p->opaque = compiler_program_new_gen_program(context->device->vendor_id, NULL, NULL);
+ p->opaque = compiler_program_new_gen_program(context->device->device_id, NULL, NULL);
for(i = 0; i < num_input_programs; i++) {
// if program create with llvm binary, need deserilize first to get module.
@@ -741,7 +741,7 @@ cl_program_compile(cl_program p,
}
}
- p->opaque = compiler_program_compile_from_source(p->ctx->device->vendor_id, p->source, temp_header_path,
+ p->opaque = compiler_program_compile_from_source(p->ctx->device->device_id, p->source, temp_header_path,
p->build_log_max_sz, options, p->build_log, &p->build_log_sz);
char rm_path[255]="rm ";
diff --git a/src/intel/intel_driver.c b/src/intel/intel_driver.c
index 9c72777..507c910 100644
--- a/src/intel/intel_driver.c
+++ b/src/intel/intel_driver.c
@@ -808,10 +808,10 @@ intel_update_device_info(cl_device_id device)
/* Prefer driver-queried max compute units if supported */
if (!drm_intel_get_eu_total(driver->fd, &eu_total))
device->max_compute_unit = eu_total;
- else if (IS_CHERRYVIEW(device->vendor_id))
+ else if (IS_CHERRYVIEW(device->device_id))
printf(CHV_CONFIG_WARNING);
#else
- if (IS_CHERRYVIEW(device->vendor_id))
+ if (IS_CHERRYVIEW(device->device_id))
printf(CHV_CONFIG_WARNING);
#endif
@@ -821,10 +821,10 @@ intel_update_device_info(cl_device_id device)
/* Prefer driver-queried subslice count if supported */
if (!drm_intel_get_subslice_total(driver->fd, &subslice_total))
device->sub_slice_count = subslice_total;
- else if (IS_CHERRYVIEW(device->vendor_id))
+ else if (IS_CHERRYVIEW(device->device_id))
printf(CHV_CONFIG_WARNING);
#else
- if (IS_CHERRYVIEW(device->vendor_id))
+ if (IS_CHERRYVIEW(device->device_id))
printf(CHV_CONFIG_WARNING);
#endif
--
2.1.4
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