[Beignet] Gen7 Instructions Opcode Examples

[Zou, Nanhai]

Hi,
         Genx instructions are not directly inserted into batch buffer.
The batch buffer contains some reference pointer which will finally point to a GPU buffer which contains GPU instructions for a kernel.
The instruction emit code are located in backend/src/backend/genx_encoder.cpp

To execute a kernel,  with only opcode and memory access is not enough.
There is an entire runtime environment need to be set up.
To understand those, I suggest you first study hardware spec at https://01.org/zh/linuxgraphics/documentation/hardware-specification-prms

Thanks
Zou Nanhai

From: Beignet [mailto:beignet-bounces at lists.freedesktop.org] On Behalf Of Dushyant Behl
Sent: Monday, July 06, 2015 8:49 PM
To: beignet at lists.freedesktop.org
Subject: [Beignet] Gen7 Instructions Opcode Examples

Hello Guys,

I'm extremely sorry if I mailed to the wrong mailing list. Please forgive me if I've done anything wrong, this is my first message to this mailing list.

I'm a masters student of computer science, I'm trying to understand the beignet project and how the batch buffers are submitted to the i915 gpu driver.
I have a problem getting hold of the arithmetic instruction formats of the Intel Gen7 Haswell processors.
Can anyone please help me by pointing me to the location where beignet compiler backend emits compiled instuctions (byte code) in the batchbuffer.
Also I wanted to ask if is possible to test the execution of one single instruction like ADD/SUB in the batch buffer by writing the opcodes along with some src and dest memory locations directly in batchbuffer rather than going through the beignet compiler.
Can anyone please provide me an example of any such instruction?

Thanks in advance,

Dushyant
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