<div dir="ltr">On Fri, Aug 9, 2013 at 4:38 PM, Song, Ruiling <span dir="ltr"><<a href="mailto:ruiling.song@intel.com" target="_blank">ruiling.song@intel.com</a>></span> wrote:<br><div class="gmail_extra"><div class="gmail_quote">
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<p class=""><span lang="EN-US" style="font-size:10.5pt;font-family:Calibri,sans-serif;color:rgb(31,73,125)">When I do a spill, I directly construct a physical register, see below:<u></u><u></u></span></p>
<p class=""><span lang="EN-US" style="font-size:10.5pt;font-family:Calibri,sans-serif;color:rgb(31,73,125)">spill->src(0) =GenRegister(GEN_GENERAL_REGISTER_FILE, dstStart + dstID, 0,<u></u><u></u></span></p>
<p class=""><span lang="EN-US" style="font-size:10.5pt;font-family:Calibri,sans-serif;color:rgb(31,73,125)"> selReg.type, selReg.vstride, selReg.width, selReg.hstride);<u></u><u></u></span></p>
<p class=""><span lang="EN-US" style="font-size:10.5pt;font-family:Calibri,sans-serif;color:rgb(31,73,125)">and also allocate one physical register from reserved register pool, change the spilled virtual register to physical register:<u></u><u></u></span></p>
<p class=""><span lang="EN-US" style="font-size:10.5pt;font-family:Calibri,sans-serif;color:rgb(31,73,125)">dst.physical =1; <a href="http://dst.nr" target="_blank">dst.nr</a> = dstStart+dstID; dst.subnr = 0;<u></u><u></u></span></p>
<p class=""><span lang="EN-US" style="font-size:10.5pt;font-family:Calibri,sans-serif;color:rgb(31,73,125)">so, in later emit code, when they call ra->genReg(), I will directly return the physical register; see GenRegAllocator::Opaque::genReg()</span></p>
</div></div></blockquote><div style> Sounds good. But if my understanding is correct, then after spill or unspill, the spilledReg will become a physical</div><div style> register:</div><div style><div> // change nr/subnr, keep other register settings</div>
<div> <a href="http://src.nr">src.nr</a> = srcStart+srcID; src.subnr=0; src.physical=1;</div><div><br></div><div><div> // change nr/subnr, keep other register settings</div><div> dst.physical =1; <a href="http://dst.nr">dst.nr</a> = dstStart+dstID; dst.subnr = 0;</div>
</div><div style> And the most important side effect is that the reserved registers will be used.</div><div style> Then latter, if we want to spill another register, then it may use the reserved registers again but those registers are already used by the</div>
<div style> previous spilled register.</div><div style><br></div><div style> Is it a problem?</div><div><br></div></div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left-width:1px;border-left-color:rgb(204,204,204);border-left-style:solid;padding-left:1ex">
<div lang="ZH-CN" link="blue" vlink="purple"><div><p class=""><span lang="EN-US" style="font-size:10.5pt;font-family:Calibri,sans-serif;color:rgb(31,73,125)"><u></u><u></u></span></p>
<p class=""><span lang="EN-US" style="font-size:10.5pt;font-family:Calibri,sans-serif;color:rgb(31,73,125)"><u></u> <u></u></span></p>
<p class=""><b><span lang="EN-US" style="font-size:10pt;font-family:Tahoma,sans-serif">From:</span></b><span lang="EN-US" style="font-size:10pt;font-family:Tahoma,sans-serif"> beignet-bounces+ruiling.song=<a href="mailto:intel.com@lists.freedesktop.org" target="_blank">intel.com@lists.freedesktop.org</a>
[mailto:<a href="mailto:beignet-bounces%2Bruiling.song" target="_blank">beignet-bounces+ruiling.song</a>=<a href="mailto:intel.com@lists.freedesktop.org" target="_blank">intel.com@lists.freedesktop.org</a>] <b>On Behalf Of
</b>zhigang gong<br>
<b>Sent:</b> Friday, August 09, 2013 4:29 PM<br>
<b>To:</b> Song, Ruiling<br>
<b>Cc:</b> <a href="mailto:beignet@lists.freedesktop.org" target="_blank">beignet@lists.freedesktop.org</a><br>
<b>Subject:</b> Re: [Beignet] [PATCH 2/2] Skip spill/unspill instruction when trying to do spill.<u></u><u></u></span></p><div><div>
<p class=""><span lang="EN-US"><u></u> <u></u></span></p>
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<p class=""><span lang="EN-US">Could you tell something more about how could a spilledReg be a physical register?<u></u><u></u></span></p>
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<p class=""><span lang="EN-US">This is not very clear for me. If a virtual register is to be spilled, then it will<u></u><u></u></span></p>
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<p class=""><span lang="EN-US">always be a virtual register, and will be unspilled when it is used. When it may<u></u><u></u></span></p>
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<p class=""><span lang="EN-US">become a physical register?<u></u><u></u></span></p>
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<p class=""><span lang="EN-US"><u></u> <u></u></span></p>
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<p class="" style="margin-bottom:12pt"><span lang="EN-US"><u></u> <u></u></span></p>
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<p class=""><span lang="EN-US">On Fri, Aug 9, 2013 at 1:23 PM, Ruiling Song <<a href="mailto:ruiling.song@intel.com" target="_blank">ruiling.song@intel.com</a>> wrote:<u></u><u></u></span></p>
<p class=""><span lang="EN-US">We can only spill virtual registers, should skip physical register.<br>
This fix random failure of compiler_box_blur when do spilling.<br>
<br>
Signed-off-by: Ruiling Song <<a href="mailto:ruiling.song@intel.com" target="_blank">ruiling.song@intel.com</a>><br>
---<br>
backend/src/backend/gen_insn_selection.cpp | 7 +++++--<br>
1 file changed, 5 insertions(+), 2 deletions(-)<br>
<br>
diff --git a/backend/src/backend/gen_insn_selection.cpp b/backend/src/backend/gen_insn_selection.cpp<br>
index 3610051..5cafa98 100644<br>
--- a/backend/src/backend/gen_insn_selection.cpp<br>
+++ b/backend/src/backend/gen_insn_selection.cpp<br>
@@ -628,12 +628,15 @@ namespace gbe<br>
<br>
for (auto &block : blockList)<br>
for (auto &insn : block.insnList) {<br>
+ // spill / unspill insn should be skipped when do spilling<br>
+ if(insn.opcode == SEL_OP_SPILL_REG || insn.opcode == SEL_OP_UNSPILL_REG) continue;<br>
+<br>
const uint32_t srcNum = insn.srcNum, dstNum = insn.dstNum;<br>
<br>
for (uint32_t srcID = 0; srcID < srcNum; ++srcID) {<br>
const GenRegister selReg = insn.src(srcID);<br>
const ir::Register reg = selReg.reg();<br>
- if(selReg.file == GEN_GENERAL_REGISTER_FILE && reg == spilledReg) {<br>
+ if(reg == spilledReg && selReg.file == GEN_GENERAL_REGISTER_FILE && selReg.physical == 0) {<br>
GBE_ASSERT(srcID < 5);<br>
SelectionInstruction *unspill = this->create(SEL_OP_UNSPILL_REG, 1, 0);<br>
unspill->state = GenInstructionState(simdWidth);<br>
@@ -652,7 +655,7 @@ namespace gbe<br>
for (uint32_t dstID = 0; dstID < dstNum; ++dstID) {<br>
const GenRegister selReg = insn.dst(dstID);<br>
const ir::Register reg = selReg.reg();<br>
- if(selReg.file == GEN_GENERAL_REGISTER_FILE && reg == spilledReg) {<br>
+ if(reg == spilledReg && selReg.file == GEN_GENERAL_REGISTER_FILE && selReg.physical == 0) {<br>
GBE_ASSERT(dstID < 5);<br>
SelectionInstruction *spill = this->create(SEL_OP_SPILL_REG, 0, 1);<br>
spill->state = GenInstructionState(simdWidth);<br>
<span><span style="color:rgb(136,136,136)">--</span></span><span style="color:rgb(136,136,136)"><br>
<span>1.7.9.5</span><br>
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<p class=""><span lang="EN-US"><u></u> <u></u></span></p>
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