[PATCH 04/11 v3] drm/i915/intel_i2c: cleanup gmbus/gpio pin assignments
daniel at ffwll.ch
Mon Mar 26 08:10:33 PDT 2012
On Mon, Mar 26, 2012 at 10:26:43PM +0800, Daniel Kurtz wrote:
> There is no GMBUS "disabled" port 0, nor "reserved" port 7.
> For the other 6 ports there is a fixed 1:1 mapping between pin pairs and
> gmbus ports, which means every real gmbus port has a gpio pin.
> Given these realizations, clean up gmbus initialization.
> Tested on Sandybridge (gen 6, PCH == CougarPoint) hardware.
> Signed-off-by: Daniel Kurtz <djkurtz at chromium.org>
Reviewed-by: Daniel Vetter <daniel.vetter at ffwll.ch>
Mail: daniel at ffwll.ch
Mobile: +41 (0)79 365 57 48
More information about the dri-devel