[PATCH] drm/radeon: remove visible vram size limit on bo allocation

[Michel Dänzer]

On 18.07.2014 01:29, Alex Deucher wrote:
> @@ -55,10 +55,13 @@ int radeon_gem_object_create(struct radeon_device *rdev, int size,
>  		alignment = PAGE_SIZE;
>  	}
>  
> -	/* maximun bo size is the minimun btw visible vram and gtt size */
> -	max_size = min(rdev->mc.visible_vram_size, rdev->mc.gtt_size);
> +	/* Maximum bo size is the gtt size since we use the gtt to handle
> +	 * vram to system pool migrations.  We could probably remove this
> +	 * check altogether with a little additional work.
> +	 */

This comment needs updating: it's not the full GTT size anymore, and how
could we remove this check?


> @@ -331,6 +335,12 @@ int radeon_bo_unpin(struct radeon_bo *bo)
>  	for (i = 0; i < bo->placement.num_placement; i++)
>  		bo->placements[i] &= ~TTM_PL_FLAG_NO_EVICT;
>  	r = ttm_bo_validate(&bo->tbo, &bo->placement, false, false);
> +	if (likely(r == 0)) {
> +		if (bo->tbo.mem.mem_type == TTM_PL_VRAM)
> +			bo->rdev->vram_pin_size -= radeon_bo_size(bo);
> +		else
> +			bo->rdev->gart_pin_size -= radeon_bo_size(bo);
> +	}
>  	if (unlikely(r != 0))
>  		dev_err(bo->rdev->dev, "%p validate failed for unpin\n", bo);

Might be better to convert the failure case to use else, no big deal though.


Other than that, the patches look good to me as well.


-- 
Earthling Michel Dänzer            |                  http://www.amd.com
Libre software enthusiast          |                Mesa and X developer