[PATCH 4/4] drm/radeon: remove visible vram size limit on bo allocation (v3)

[Michel Dänzer]

On 19.07.2014 00:09, Alex Deucher wrote:
> Now that fallback to gtt is fixed for cpu access, we can
> remove this limit.
> 
> bug:
> https://bugs.freedesktop.org/show_bug.cgi?id=78717
> 
> v2: use new gart_pin_size to accurately track available gtt.
> v3: fix comment

[...]

> @@ -55,10 +55,14 @@ int radeon_gem_object_create(struct radeon_device *rdev, int size,
>  		alignment = PAGE_SIZE;
>  	}
>  
> -	/* maximun bo size is the minimun btw visible vram and gtt size */
> -	max_size = min(rdev->mc.visible_vram_size, rdev->mc.gtt_size);
> +	/* Maximum bo size is the unpinned gtt size since we use the gtt to
> +	 * handle vram to system pool migrations.  We could probably remove
> +	 * this check altogether with a little additional work to support
> +	 * splitting vram <-> system transfers into multiple steps.
> +	 */
> +	max_size = rdev->mc.gtt_size - rdev->gart_pin_size;

Actually, the the check couldn't be removed even then, but would need to
be replaced by a check against the VRAM size or something like that.
Maybe just drop the second sentence of the comment?

Either way though, the series is

Reviewed-by: Michel Dänzer <michel.daenzer at amd.com>


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Earthling Michel Dänzer            |                  http://www.amd.com
Libre software enthusiast          |                Mesa and X developer