[Nouveau] [PATCH 09/17] drm/radeon: use common fence implementation for fences

Daniel Vetter daniel.vetter at ffwll.ch
Wed Jul 23 02:30:44 PDT 2014


On Wed, Jul 23, 2014 at 11:27 AM, Christian König
<christian.koenig at amd.com> wrote:
> You submit a job to the hardware and then block the job to wait for radeon
> to be finished? Well than this would indeed require a hardware reset, but
> wouldn't that make the whole problem even worse?
>
> I mean currently we block one userspace process to wait for other hardware
> to be finished with a buffer, but what you are describing here blocks the
> whole hardware to wait for other hardware which in the end blocks all
> userspace process accessing the hardware.

There is nothing new here with prime - if one context hangs the gpu it
blocks everyone else on i915.

> Talking about alternative approaches wouldn't it be simpler to just offload
> the waiting to a different kernel or userspace thread?

Well this is exactly what we'll do once we have the scheduler. But
this is an orthogonal issue imo.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch


More information about the dri-devel mailing list