[PATCH 0/9] drm/exynos: update codes related with gem

[Joonyoung Shim]

On 10/13/2015 05:37 PM, Joonyoung Shim wrote:
> On 10/13/2015 05:27 PM, Daniel Vetter wrote:
>> On Tue, Oct 13, 2015 at 04:00:45PM +0900, Joonyoung Shim wrote:
>>> Hi,
>>>
>>> This patchset is about gem codes update of exynos-drm.
>>>
>>> The first and second patches are cleanup to remove useless codes.
>>> The rest is to support cachable gem allocation.
>>>
>>> The exynos-drm uses DMA mapping API to allocate/mmap buffer of gem. If
>>> it is cachable, does it with DMA_ATTR_NON_CONSISTENT attribute, but
>>> DMA_ATTR_NON_CONSISTENT isn't supported in DMA mapping API of ARM, so it
>>> doesn't give any effects.
>>>
>>> This patchset introduces new buffer allocation to use
>>> drm_gem_get/put_pages() instead of DMA mapping API. It will be used
>>> for the rest except allocation of physically continuous buffer on
>>> non-iommu, then exynos-drm can support cachable buffer of gem. Also it
>>> can support physically non-continuous buffer on non-iommu.
>>>
>>> EXYNOS_BO_CONTIG flag on iommu is ambiguous because it doesn't care
>>> whether buffer is continuous physically if iommu is supported. This
>>> patchset always will use EXYNOS_BO_CONTIG flag on iommu and then can
>>> mean that the buffer is continuous for device.
>>>
>>> There is no user API to control cache coherence for the cpu and device
>>> about cachable buffer. This patchset introduces two ioctls for cpu
>>> access of gem object from user. It will be synced properly in order for
>>> the cpu and device if buffer of gem object is cachable.
>>
>> Out of curiosity, where's the userspace part for this work? Usually kernel
>> abi extensions come with a link to the relevant branch for easier review.
>> -Daniel
>>
> 
> Right, thanks for point.
> 
> I just modified a little bit exynos_fimg2d_test and exynos parts of
> libdrm to test them as workaround. I will expose it.
> 

Please refer follows.
https://github.com/dofmind/libdrm/commits/exynos

If fimd2d test program uses cachable gem, it will show cache coherency
problem, so it adds to use new ioctls to keep cache coherency.

Thanks.

> Thanks.
> 
>>>
>>> Thanks.
>>>
>>> Joonyoung Shim (9):
>>>   drm/exynos: eliminate useless codes of exynos_drm_gem.h
>>>   drm/exynos: use directly DMA mapping APIs on g2d
>>>   drm/exynos: remove using non-consistent DMA attribute
>>>   drm/exynos: split buffer allocation using DMA mapping API on non-iommu
>>>   drm/exynos: introduce buffer allocation using drm_gem_get/put_pages()
>>>   drm/exynos: switch to new buffer allocation
>>>   drm/exynos: always use EXYNOS_BO_CONTIG flag on iommu
>>>   drm/exynos: use DMA_ERROR_CODE
>>>   drm/exynos: add ioctls for cpu access of gem object from user
>>>
>>>  drivers/gpu/drm/exynos/exynos_drm_drv.c   |   4 +
>>>  drivers/gpu/drm/exynos/exynos_drm_fb.c    |  32 +---
>>>  drivers/gpu/drm/exynos/exynos_drm_fbdev.c |  14 +-
>>>  drivers/gpu/drm/exynos/exynos_drm_g2d.c   |  10 +-
>>>  drivers/gpu/drm/exynos/exynos_drm_gem.c   | 288 ++++++++++++++++++------------
>>>  drivers/gpu/drm/exynos/exynos_drm_gem.h   |  56 ++----
>>>  include/uapi/drm/exynos_drm.h             |  23 ++-
>>>  7 files changed, 225 insertions(+), 202 deletions(-)
>>>
>>> -- 
>>> 1.9.1
>>>
>>> _______________________________________________
>>> dri-devel mailing list
>>> dri-devel at lists.freedesktop.org
>>> http://lists.freedesktop.org/mailman/listinfo/dri-devel
>>
> 
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