[PATCH 3/4] drm/panel: simple: add CDTech S070PWS19HP-FC21 and S070SWV29HG-DC44

[Sam Ravnborg]

Hi Matthias.

Thanks, a few details you need to fix. See below.

	Sam

On Wed, Jun 10, 2020 at 02:01:30PM +0200, Matthias Schiffer wrote:
> From: Michael Krummsdorf <michael.krummsdorf at tq-group.com>
> 
> Add support for the CDTech Electronics displays S070PWS19HP-FC21
> (7.0" WSVGA) and S070SWV29HG-DC44 (7.0" WVGA) to panel-simple.
> 
> Signed-off-by: Michael Krummsdorf <michael.krummsdorf at tq-group.com>
> Signed-off-by: Matthias Schiffer <matthias.schiffer at ew.tq-group.com>
> ---
>  drivers/gpu/drm/panel/panel-simple.c | 60 ++++++++++++++++++++++++++++
>  1 file changed, 60 insertions(+)
> 
> diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c
> index b6ecd1552132..1673113e5a5a 100644
> --- a/drivers/gpu/drm/panel/panel-simple.c
> +++ b/drivers/gpu/drm/panel/panel-simple.c
> @@ -1315,6 +1315,60 @@ static const struct panel_desc cdtech_s043wq26h_ct7 = {
>  	.bus_flags = DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE,
>  };
>  
> +/* S070PWS19HP-FC21 2017/04/22 */
> +static const struct drm_display_mode cdtech_s070pws19hp_fc21_mode = {
> +	.clock = 51200,
> +	.hdisplay = 1024,
> +	.hsync_start = 1024 + 160,
> +	.hsync_end = 1024 + 160 + 20,
> +	.htotal = 1024 + 160 + 20 + 140,
> +	.vdisplay = 600,
> +	.vsync_start = 600 + 12,
> +	.vsync_end = 600 + 12 + 3,
> +	.vtotal = 600 + 12 + 3 + 20,
> +	.vrefresh = 60,
.vrefresh is no longer present, please drop.
> +	.flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
> +};
> +
> +static const struct panel_desc cdtech_s070pws19hp_fc21 = {
> +	.modes = &cdtech_s070pws19hp_fc21_mode,
> +	.num_modes = 1,
> +	.bpc = 6,
> +	.size = {
> +		.width = 154,
> +		.height = 86,
> +	},
> +	.bus_format = MEDIA_BUS_FMT_RGB666_1X18,
> +	.bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_PIXDATA_POSEDGE,
> +};
Please add .connector_type - it is mandatory.
> +
> +/* S070SWV29HG-DC44 2017/09/21 */
> +static const struct drm_display_mode cdtech_s070swv29hg_dc44_mode = {
> +	.clock = 33300,
> +	.hdisplay = 800,
> +	.hsync_start = 800 + 210,
> +	.hsync_end = 800 + 210 + 2,
> +	.htotal = 800 + 210 + 2 + 44,
> +	.vdisplay = 480,
> +	.vsync_start = 480 + 22,
> +	.vsync_end = 480 + 22 + 2,
> +	.vtotal = 480 + 22 + 2 + 21,
> +	.vrefresh = 60,
.vrefresh is no longer present, please drop.
> +	.flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
> +};
> +
> +static const struct panel_desc cdtech_s070swv29hg_dc44 = {
> +	.modes = &cdtech_s070swv29hg_dc44_mode,
> +	.num_modes = 1,
> +	.bpc = 6,
> +	.size = {
> +		.width = 154,
> +		.height = 86,
> +	},
> +	.bus_format = MEDIA_BUS_FMT_RGB666_1X18,
> +	.bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_PIXDATA_POSEDGE,
Please add .connector_type - it is mandatory.
> +};
> +
>  static const struct drm_display_mode cdtech_s070wv95_ct16_mode = {
>  	.clock = 35000,
>  	.hdisplay = 800,
> @@ -3723,6 +3777,12 @@ static const struct of_device_id platform_of_match[] = {
>  	}, {
>  		.compatible = "cdtech,s043wq26h-ct7",
>  		.data = &cdtech_s043wq26h_ct7,
> +	}, {
> +		.compatible = "cdtech,s070pws19hp-fc21",
> +		.data = &cdtech_s070pws19hp_fc21,
> +	}, {
> +		.compatible = "cdtech,s070swv29hg-dc44",
> +		.data = &cdtech_s070swv29hg_dc44,
>  	}, {
>  		.compatible = "cdtech,s070wv95-ct16",
>  		.data = &cdtech_s070wv95_ct16,
> -- 
> 2.17.1