[PATCH] drm/amdgpu: Enabling FW workaround through shared memory for VCN4_0_2

[Leo Liu]

Reviewed-by: Leo Liu <leo.liiu at amd.com>

On 2023-07-17 23:20, sguttula wrote:
> This patch will enable VCN FW workaround using
> DRM KEY INJECT WORKAROUND method,
> which is helping in fixing the secure playback.
>
> Signed-off-by: sguttula <Suresh.Guttula at amd.com>
>
> ---
>
> Changes in v2:
> -updated commit message as per veera's feedback
>
> Changes in v3:
> -updated commit message as enabling for 402
> -updated the logic as per leo, feedback
> ---
>   drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h | 9 +++++++++
>   drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c   | 6 ++++++
>   2 files changed, 15 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h
> index 1f1d7dc94f90..a3eed90b6af0 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h
> @@ -161,6 +161,7 @@
>   	} while (0)
>   
>   #define AMDGPU_FW_SHARED_FLAG_0_UNIFIED_QUEUE (1 << 2)
> +#define AMDGPU_FW_SHARED_FLAG_0_DRM_KEY_INJECT (1 << 4)
>   #define AMDGPU_VCN_FW_SHARED_FLAG_0_RB	(1 << 6)
>   #define AMDGPU_VCN_MULTI_QUEUE_FLAG	(1 << 8)
>   #define AMDGPU_VCN_SW_RING_FLAG		(1 << 9)
> @@ -180,6 +181,8 @@
>   #define AMDGPU_VCN_SMU_DPM_INTERFACE_DGPU (0)
>   #define AMDGPU_VCN_SMU_DPM_INTERFACE_APU (1)
>   
> +#define AMDGPU_DRM_KEY_INJECT_WORKAROUND_VCNFW_ASD_HANDSHAKING 2
> +
>   enum fw_queue_mode {
>   	FW_QUEUE_RING_RESET = 1,
>   	FW_QUEUE_DPG_HOLD_OFF = 2,
> @@ -343,6 +346,11 @@ struct amdgpu_fw_shared_rb_setup {
>   	uint32_t  reserved[6];
>   };
>   
> +struct amdgpu_fw_shared_drm_key_wa {
> +	uint8_t  method;
> +	uint8_t  reserved[3];
> +};
> +
>   struct amdgpu_vcn4_fw_shared {
>   	uint32_t present_flag_0;
>   	uint8_t pad[12];
> @@ -352,6 +360,7 @@ struct amdgpu_vcn4_fw_shared {
>   	uint8_t pad2[20];
>   	struct amdgpu_fw_shared_rb_setup rb_setup;
>   	struct amdgpu_fw_shared_smu_interface_info smu_dpm_interface;
> +	struct amdgpu_fw_shared_drm_key_wa drm_key_wa;
>   };
>   
>   struct amdgpu_vcn_fwlog {
> diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c
> index e8c02ae10163..16ee73cfc3a8 100644
> --- a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c
> @@ -169,6 +169,12 @@ static int vcn_v4_0_sw_init(void *handle)
>   		fw_shared->smu_dpm_interface.smu_interface_type = (adev->flags & AMD_IS_APU) ?
>   			AMDGPU_VCN_SMU_DPM_INTERFACE_APU : AMDGPU_VCN_SMU_DPM_INTERFACE_DGPU;
>   
> +		if (adev->ip_versions[VCN_HWIP][0] == IP_VERSION(4, 0, 2)) {
> +			fw_shared->present_flag_0 |= AMDGPU_FW_SHARED_FLAG_0_DRM_KEY_INJECT;
> +			fw_shared->drm_key_wa.method =
> +				AMDGPU_DRM_KEY_INJECT_WORKAROUND_VCNFW_ASD_HANDSHAKING;
> +		}
> +
>   		if (amdgpu_sriov_vf(adev))
>   			fw_shared->present_flag_0 |= cpu_to_le32(AMDGPU_VCN_VF_RB_SETUP_FLAG);
>