[PATCH] drm/panel: boe-tv101wum-nl6: Fine tune Himax83102-j02 panel HFP and HBP

[cong yang]

Hi,

On Sat, Nov 11, 2023 at 5:10 AM Doug Anderson <dianders at google.com> wrote:
>
> Hi,
>
> On Fri, Nov 10, 2023 at 1:46 AM Cong Yang
> <yangcong5 at huaqin.corp-partner.google.com> wrote:
> >
> > The refresh reported by modotest is 60.46Hz, and the actual measurement
>
> s/modotets/modetest/
>
> > is 60.01Hz, which is outside the expected tolerance. Adjust hporch and
> > pixel clock to fix it. After repair, modetest and actual measurement were
> > all 60.01Hz.
>
> Can you explain this more? Why was the rate that modetest reported
> different from the actual measured rate? This feels like it's a
> problem with your MIPI controller not being able to accurately make
> the rate. Is that it?

modetest refresh = Pixel CLK/ htotal  * vtotal
measurement HS->LP cycle time = Vblanking
According to the vendor's feedback, the actual measured frame rate is not
only affected by Htotal/Vtotal/pixel clock,  Lane-num/PixelBit/LineTime also
affected. It seems that if  change to a different SOC platform,  may
need to readjust
these parameters.


>
> If so then this is a bit of a hack. Someone else using the same panel
> might have a MIPI controller that can make slightly different clock
> rates. I think you're currently the only user of the panel, so maybe
> this isn't too terrible (would love to hear other people's advice).
>
> Assuming this is actually the problem there are probably at least
> several different ways to solve this. One that comes to mind is the
> solution we ended up with for eDP where we allowed specifying some of
> this stuff in the device tree, though that might cause a whole pile of
> debates...
>
> In any case, as I said above this patch is probably OK if you're the
> only user of this panel, but it might be at least good to add
> something to the commit message?

OK, I'll add some instructions in V2. Thanks.

>
> -Doug