[PATCH v6 06/10] drm/msm/dpu: deduplicate some (most) of SSPP sub-blocks

[Abhinav Kumar]

On 10/31/2023 1:16 AM, Dmitry Baryshkov wrote:
> On Mon, 30 Oct 2023 at 21:52, Abhinav Kumar <quic_abhinavk at quicinc.com> wrote:
>>
>>
>>
>> On 10/6/2023 6:14 AM, Dmitry Baryshkov wrote:
>>> As we have dropped the variadic parts of SSPP sub-blocks declarations,
>>> deduplicate them now, reducing memory cruft.
>>>
>>> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov at linaro.org>
>>> ---
>>>    .../msm/disp/dpu1/catalog/dpu_3_0_msm8998.h   | 16 +--
>>>    .../msm/disp/dpu1/catalog/dpu_4_0_sdm845.h    | 16 +--
>>>    .../msm/disp/dpu1/catalog/dpu_5_0_sm8150.h    | 16 +--
>>>    .../msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h   | 16 +--
>>>    .../msm/disp/dpu1/catalog/dpu_5_4_sm6125.h    |  6 +-
>>>    .../msm/disp/dpu1/catalog/dpu_6_0_sm8250.h    | 16 +--
>>>    .../msm/disp/dpu1/catalog/dpu_6_2_sc7180.h    |  8 +-
>>>    .../msm/disp/dpu1/catalog/dpu_6_3_sm6115.h    |  4 +-
>>>    .../msm/disp/dpu1/catalog/dpu_6_4_sm6350.h    |  8 +-
>>>    .../msm/disp/dpu1/catalog/dpu_6_5_qcm2290.h   |  4 +-
>>>    .../msm/disp/dpu1/catalog/dpu_6_9_sm6375.h    |  4 +-
>>>    .../msm/disp/dpu1/catalog/dpu_7_0_sm8350.h    | 16 +--
>>>    .../msm/disp/dpu1/catalog/dpu_7_2_sc7280.h    |  8 +-
>>>    .../msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h  | 16 +--
>>>    .../msm/disp/dpu1/catalog/dpu_8_1_sm8450.h    | 16 +--
>>>    .../msm/disp/dpu1/catalog/dpu_9_0_sm8550.h    | 20 ++--
>>>    .../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c    | 97 +++++--------------
>>>    17 files changed, 120 insertions(+), 167 deletions(-)
>>>
>>
>> <snip>
>>
>>> diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h
>>> index e60427f54b27..860feb9c54e6 100644
>>> --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h
>>> +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h
>>> @@ -77,7 +77,7 @@ static const struct dpu_sspp_cfg sm8550_sspp[] = {
>>>                .name = "sspp_0", .id = SSPP_VIG0,
>>>                .base = 0x4000, .len = 0x344,
>>>                .features = VIG_SC7180_MASK,
>>> -             .sblk = &sm8550_vig_sblk_0,
>>> +             .sblk = &dpu_vig_sblk_qseed3_3_2,
>>
>> Some of this naming doesnt sound right to me. What I had suggested was
>> just dpu_vig_sblk_scaler_x_y but what is used is dpu_vig_sblk_qseedx_x_y
>>
>> This is not correct because technically sm8550 was qseed4 as its scaler
>> version is > 0x3000
>>
>> So this adds some discrepancy in the naming.
> 
> And as I wrote, scaler is also not correct. We know qseed2 and rgb
> scalers, which use different versioning (if they have versions at
> all). I used qseed3, as it is the base version of the qseed3 / 3lite /
> 4 scalers. Of course we can switch back to 3/3lite/4, but I thought
> that it was not that related to the hardware.
> 

Ok got it. So qseed3_major_minor will implicitly tell is its qseed4 or 
not. From the chipsets till where I have visibility into, this naming 
scheme will work. We can re-visit this if this assumption changes at 
some point. Hence,

Reviewed-by: Abhinav Kumar <quic_abhinavk at quicinc.com>