[Intel-gfx] [PATCH] drm/i915/mtl: Skip MCR ops for ring fault register

Nirmoy Das nirmoy.das at linux.intel.com
Tue Sep 26 19:17:38 UTC 2023


Hi Matt,

On 9/26/2023 4:38 PM, Matt Roper wrote:
> On Tue, Sep 26, 2023 at 04:18:42PM +0200, Nirmoy Das wrote:
>> On MTL GEN12_RING_FAULT_REG is not replicated so don't
>> do mcr based operation for this register.
>>
>> Signed-off-by: Nirmoy Das <nirmoy.das at intel.com>
>> ---
>>   drivers/gpu/drm/i915/gt/intel_gt.c      | 14 +++++++++++++-
>>   drivers/gpu/drm/i915/gt/intel_gt_regs.h |  1 +
>>   drivers/gpu/drm/i915/i915_gpu_error.c   | 11 ++++++++++-
>>   3 files changed, 24 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c b/drivers/gpu/drm/i915/gt/intel_gt.c
>> index 93062c35e072..d4de692e8be1 100644
>> --- a/drivers/gpu/drm/i915/gt/intel_gt.c
>> +++ b/drivers/gpu/drm/i915/gt/intel_gt.c
>> @@ -262,10 +262,22 @@ intel_gt_clear_error_registers(struct intel_gt *gt,
>>   				   I915_MASTER_ERROR_INTERRUPT);
>>   	}
>>   
>> -	if (GRAPHICS_VER_FULL(i915) >= IP_VER(12, 50)) {
>> +	/*
>> +	 * for media tile this ring fault register is not replicated
>> +	 * so skip doing mcr ops on it.
>> +	 */
>> +	if (GRAPHICS_VER_FULL(i915) >= IP_VER(12, 50) &&
> This should be checking the media version rather than the graphics
> version.  I.e., "MEDIA_VER(i915) > 13" since it's possible future
> versions of the media IP may change the behavior (independently of the
> graphics IP versions).
Sounds good. I will replace this with

if (MEDIA_VER(i915) == 13 && engine->gt->type == GT_MEDIA)

to limit this this change on media IP 13


Thanks,

Nirmoy

>
>
> Matt
>
>> +	    gt->type == GT_MEDIA) {
>> +		intel_uncore_rmw(uncore, XELPMP_RING_FAULT_REG,
>> +				 RING_FAULT_VALID, 0);
>> +		intel_uncore_posting_read(uncore,
>> +					  XELPMP_RING_FAULT_REG);
>> +
>> +	} else if (GRAPHICS_VER_FULL(i915) >= IP_VER(12, 50)) {
>>   		intel_gt_mcr_multicast_rmw(gt, XEHP_RING_FAULT_REG,
>>   					   RING_FAULT_VALID, 0);
>>   		intel_gt_mcr_read_any(gt, XEHP_RING_FAULT_REG);
>> +
>>   	} else if (GRAPHICS_VER(i915) >= 12) {
>>   		intel_uncore_rmw(uncore, GEN12_RING_FAULT_REG, RING_FAULT_VALID, 0);
>>   		intel_uncore_posting_read(uncore, GEN12_RING_FAULT_REG);
>> diff --git a/drivers/gpu/drm/i915/gt/intel_gt_regs.h b/drivers/gpu/drm/i915/gt/intel_gt_regs.h
>> index cca4bac8f8b0..eecd0a87a647 100644
>> --- a/drivers/gpu/drm/i915/gt/intel_gt_regs.h
>> +++ b/drivers/gpu/drm/i915/gt/intel_gt_regs.h
>> @@ -1084,6 +1084,7 @@
>>   
>>   #define GEN12_RING_FAULT_REG			_MMIO(0xcec4)
>>   #define XEHP_RING_FAULT_REG			MCR_REG(0xcec4)
>> +#define XELPMP_RING_FAULT_REG			_MMIO(0xcec4)
>>   #define   GEN8_RING_FAULT_ENGINE_ID(x)		(((x) >> 12) & 0x7)
>>   #define   RING_FAULT_GTTSEL_MASK		(1 << 11)
>>   #define   RING_FAULT_SRCID(x)			(((x) >> 3) & 0xff)
>> diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c
>> index f4ebcfb70289..83f1a729da8b 100644
>> --- a/drivers/gpu/drm/i915/i915_gpu_error.c
>> +++ b/drivers/gpu/drm/i915/i915_gpu_error.c
>> @@ -1234,7 +1234,16 @@ static void engine_record_registers(struct intel_engine_coredump *ee)
>>   	if (GRAPHICS_VER(i915) >= 6) {
>>   		ee->rc_psmi = ENGINE_READ(engine, RING_PSMI_CTL);
>>   
>> -		if (GRAPHICS_VER_FULL(i915) >= IP_VER(12, 50))
>> +		/*
>> +		 * for media tile this ring fault register is not replicated
>> +		 * so skip doing mcr ops on it.
>> +		 */
>> +		if (GRAPHICS_VER_FULL(i915) >= IP_VER(12, 50) &&
>> +		    engine->gt->type == GT_MEDIA)
>> +			ee->fault_reg = intel_uncore_read(engine->uncore,
>> +							  XELPMP_RING_FAULT_REG);
>> +
>> +		else if (GRAPHICS_VER_FULL(i915) >= IP_VER(12, 50))
>>   			ee->fault_reg = intel_gt_mcr_read_any(engine->gt,
>>   							      XEHP_RING_FAULT_REG);
>>   		else if (GRAPHICS_VER(i915) >= 12)
>> -- 
>> 2.41.0
>>


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