Hi Jesse, 2011/11/15 Jesse Barnes <<a href="mailto:jbarnes@virtuousgeek.org">jbarnes@virtuousgeek.org</a>> > > To properly support the various plane formats supported by different > hardware, the kernel must know the pixel format of a framebuffer object. > So add a new ioctl taking a format argument corresponding to a fourcc > name from the new drm_fourcc.h header file. Implement the fb creation > hooks in terms of the new mode_fb_cmd2 using helpers where the old > bpp/depth values are needed. > > v2: create DRM specific fourcc header file for sharing with libdrm etc > v3: fix rebase failure and use DRM fourcc codes in intel_display.c and > update commit message > v4: make fb_cmd2 handle field into an array for multi-object formats > pull in Ville's fix for the memcpy in drm_plane_init > apply Ville's cleanup to zero out fb_cmd2 arg in drm_mode_addfb > v5: add 'flags' field for interlaced support (from Ville) > > Signed-off-by: Ville Syrjälä <<a href="mailto:ville.syrjala@linux.intel.com">ville.syrjala@linux.intel.com</a>> > Acked-by: Alan Cox <<a href="mailto:alan@lxorguk.ukuu.org.uk">alan@lxorguk.ukuu.org.uk</a>> > Reviewed-by: Rob Clark <<a href="mailto:rob.clark@linaro.org">rob.clark@linaro.org</a>> > Signed-off-by: Jesse Barnes <<a href="mailto:jbarnes@virtuousgeek.org">jbarnes@virtuousgeek.org</a>> > --- > drivers/gpu/drm/drm_crtc.c | 111 +++++++++++++++++++++++++++-- > drivers/gpu/drm/drm_crtc_helper.c | 51 ++++++++++++- > drivers/gpu/drm/drm_drv.c | 1 + > drivers/gpu/drm/i915/intel_display.c | 39 ++++++----- > drivers/gpu/drm/i915/intel_drv.h | 2 +- > drivers/gpu/drm/i915/intel_fb.c | 11 ++-- > drivers/gpu/drm/nouveau/nouveau_display.c | 6 +- > drivers/gpu/drm/nouveau/nouveau_fb.h | 2 +- > drivers/gpu/drm/nouveau/nouveau_fbcon.c | 13 ++-- > drivers/gpu/drm/radeon/radeon_display.c | 8 +- > drivers/gpu/drm/radeon/radeon_fb.c | 18 +++-- > drivers/gpu/drm/radeon/radeon_mode.h | 2 +- > drivers/gpu/drm/vmwgfx/vmwgfx_kms.c | 22 ++++-- > drivers/gpu/drm/vmwgfx/vmwgfx_kms.h | 1 + > drivers/staging/gma500/framebuffer.c | 2 +- > include/drm/drm.h | 1 + > include/drm/drm_crtc.h | 9 ++- > include/drm/drm_crtc_helper.h | 4 +- > include/drm/drm_fourcc.h | 63 ++++++++++++++++ > include/drm/drm_mode.h | 27 +++++++ > 20 files changed, 327 insertions(+), 66 deletions(-) > create mode 100644 include/drm/drm_fourcc.h > <snip> > diff --git a/drivers/staging/gma500/framebuffer.c b/drivers/staging/gma500/framebuffer.c > index 3f39a37..1e77229 100644 > --- a/drivers/staging/gma500/framebuffer.c > +++ b/drivers/staging/gma500/framebuffer.c > @@ -546,7 +546,7 @@ out_err1: > */ > static struct drm_framebuffer *psb_user_framebuffer_create > (struct drm_device *dev, struct drm_file *filp, > - struct drm_mode_fb_cmd *cmd) > + struct drm_mode_fb_cmd2 *cmd) > { > struct gtt_range *r; > struct drm_gem_object *obj; I have no idea that this staging driver is really used or not, but anyway if drm_mode_fb_cmd2 is used here, then also it looks like that *cmd->handle* and *psb_framebuffer_create(dev, cmd, r)* are changed. psb_framebuffer_create() and psb_framebuffer_init() still use drm_mode_fb_cmd, so maybe changed like vmwgfx_kms.c. <snip> > +++ b/include/drm/drm_mode.h > @@ -266,6 +266,33 @@ struct drm_mode_fb_cmd { > __u32 handle; > }; > > +#define DRM_MODE_FB_INTERLACED (1<<0 /* for interlaced framebuffers */ > + > +struct drm_mode_fb_cmd2 { > + __u32 fb_id; > + __u32 width, height; > + __u32 pixel_format; /* fourcc code from drm_fourcc.h */ > + __u32 flags; /* see above flags */ > + > + /* > + * In case of planar formats, this ioctl allows up to 4 > + * buffer objects with offets and pitches per plane. > + * The pitch and offset order is dictated by the fourcc, > + * e.g. NV12 (<a href="http://fourcc.org/yuv.php#NV12">http://fourcc.org/yuv.php#NV12</a>) is described as: > + * > + * YUV 4:2:0 image with a plane of 8 bit Y samples > + * followed by an interleaved U/V plane containing > + * 8 bit 2x2 subsampled colour difference samples. > + * > + * So it would consist of Y as offset[0] and UV as > + * offeset[1]. Note that offset[0] will generally > + * be 0. > + */ > + __u32 handles[4]; > + __u32 pitches[4]; /* pitch for each plane */ > + __u32 offsets[4]; /* offset of each plane */ > +}; <snip> Regards, - Seung-Woo Kim