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<b><a class="bz_bug_link
bz_status_NEW "
title="NEW --- - r600g R600_LLVM=1 bad rendering (light blue instead of grey)"
href="https://bugs.freedesktop.org/show_bug.cgi?id=55256#c7">Comment # 7</a>
on <a class="bz_bug_link
bz_status_NEW "
title="NEW --- - r600g R600_LLVM=1 bad rendering (light blue instead of grey)"
href="https://bugs.freedesktop.org/show_bug.cgi?id=55256">bug 55256</a>
from <span class="vcard"><a class="email" href="mailto:agd5f@yahoo.com" title="Alex Deucher <agd5f@yahoo.com>"> <span class="fn">Alex Deucher</span></a>
</span></b>
<pre>There are some asic specific shader instruction behaviors for r6xx/r7xx chips
that need to be ported to the LLVM backend. A couple that come to mind:
- Trig functions (see tgsi_setup_trig() in r600_shader.c)
- AR register handling (see load_ar() in r600_asm.c)</pre>
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