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            <b><a class="bz_bug_link 
          bz_status_NEW "
   title="NEW --- - On HD6850, Power Profile doesn't change if 2 screen is attached."
   href="https://bugs.freedesktop.org/show_bug.cgi?id=49981#c24">Comment # 24</a>
              on <a class="bz_bug_link 
          bz_status_NEW "
   title="NEW --- - On HD6850, Power Profile doesn't change if 2 screen is attached."
   href="https://bugs.freedesktop.org/show_bug.cgi?id=49981">bug 49981</a>
              from <span class="vcard"><a class="email" href="mailto:awaters1@gmail.com" title="Anthony Waters <awaters1@gmail.com>"> <span class="fn">Anthony Waters</span></a>
</span></b>
        <pre>On a HD6950 this patches causes the GPU to lock up if the GPU is in the low
power profile and the x server is started with multiple monitors attached.  The
x server doesn't crash immediatly, but crashes upon opening anything. I am
unable to SSH in so I cannot obtain a dmesg upon the crash.

Here are more details
1. Start up computer
2. Put gpu into low power profile through `echo low >
/sys/class/drm/card0/device/power_profile`
3. radeon_pm_info shows something like
default engine clock: 800000 kHz
current engine clock: 249990 kHz
default memory clock: 1250000 kHz
current memory clock: 1250000 kHz
voltage: 900 mV
(as expected because the patch pushesh the memory clock to the maximum with
multiple heads)
4. start the x server and open an application, GPU locks up/crashes and
displays corruption some times

However, if the GPU is set to be in the high power profile it doesn't crash. 
Here are the power tables from the GPU

[    0.814049] [drm:radeon_pm_print_states], 4 Power State(s)
[    0.814050] [drm:radeon_pm_print_states], State 0: 
[    0.814051] [drm:radeon_pm_print_states],    Default
[    0.814052] [drm:radeon_pm_print_states], 
[    0.814053]  16 PCIE Lanes
[    0.814138] [drm:radeon_pm_print_states],    3 Clock Mode(s)
[    0.814138] [drm:radeon_pm_print_states],            0 e: 800000     m:
1250000      v: 1175
[    0.814140] [drm:radeon_pm_print_states],            1 e: 800000     m:
1250000      v: 1175
[    0.814141] [drm:radeon_pm_print_states],            2 e: 800000     m:
1250000      v: 1175
[    0.814142] [drm:radeon_pm_print_states], State 1: Performance
[    0.814143] [drm:radeon_pm_print_states],    16 PCIE Lanes
[    0.814144] [drm:radeon_pm_print_states],    3 Clock Mode(s)
[    0.814145] [drm:radeon_pm_print_states],            0 e: 250000     m:
150000       v: 900
[    0.814146] [drm:radeon_pm_print_states],            1 e: 500000     m:
1250000      v: 1000
[    0.814147] [drm:radeon_pm_print_states],            2 e: 870000     m:
1250000      v: 1175
[    0.814148] [drm:radeon_pm_print_states], State 2: 
[    0.814149] [drm:radeon_pm_print_states],    16 PCIE Lanes
[    0.814150] [drm:radeon_pm_print_states],    3 Clock Mode(s)
[    0.814150] [drm:radeon_pm_print_states],            0 e: 500000     m:
1250000      v: 1000
[    0.814151] [drm:radeon_pm_print_states],            1 e: 500000     m:
1250000      v: 1000
[    0.814152] [drm:radeon_pm_print_states],            2 e: 870000     m:
1250000      v: 1175
[    0.814154] [drm:radeon_pm_print_states], State 3: 
[    0.814154] [drm:radeon_pm_print_states],    16 PCIE Lanes
[    0.814155] [drm:radeon_pm_print_states],    3 Clock Mode(s)
[    0.814156] [drm:radeon_pm_print_states],            0 e: 500000     m:
1250000      v: 1000
[    0.814157] [drm:radeon_pm_print_states],            1 e: 500000     m:
1250000      v: 1000
[    0.814158] [drm:radeon_pm_print_states],            2 e: 870000     m:
1250000      v: 1175

To summarize (all with multiple heads)

1. e: 250000 m: 1250000 v: 900 - crash
2. e: 800000 m: 1250000 v: 1175 - no crash
3. e: 250000 m: 150000  v: 900 - no crash</pre>
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