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<b><a class="bz_bug_link
bz_status_NEW "
title="NEW --- - LLVM RV670 regression since R600: Packetize instructions"
href="https://bugs.freedesktop.org/show_bug.cgi?id=64193#c10">Comment # 10</a>
on <a class="bz_bug_link
bz_status_NEW "
title="NEW --- - LLVM RV670 regression since R600: Packetize instructions"
href="https://bugs.freedesktop.org/show_bug.cgi?id=64193">bug 64193</a>
from <span class="vcard"><a class="email" href="mailto:ptpzz@yandex.ru" title="Vadim Girlin <ptpzz@yandex.ru>"> <span class="fn">Vadim Girlin</span></a>
</span></b>
<pre>I looked a bit more into it and AFAICS it's not just a single wrong bit, looks
like r700 alu encoding is used for all r600 chips with llvm backend
currently(In reply to <a href="show_bug.cgi?id=64193#c9">comment #9</a>)
<span class="quote">> As mentioned by Vadim on IRC:
> it seems many instructions in bytecode generated for RS880 have (incorrect)
> OMOD = 2, that is, ALU WORD1 bit 7 is set where it shouldn't be set</span >
I looked a bit more into it and AFAICS it's not just a single wrong bit, looks
like r700 alu encoding is used for all r600 chips with llvm backend currently</pre>
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