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<div class="moz-cite-prefix">You probably want to patch up mclk_wait
in nva3_pm.c as well for now (until this code is ported to HWSQ or
PDAEMON), even though it's not used by a lot of people.<br>
<br>
Op 01-06-13 00:22, Arnd Bergmann schreef:<br>
</div>
<blockquote
cite="mid:1370038972-2318779-4-git-send-email-arnd@arndb.de"
type="cite">
<pre wrap="">ARM cannot handle udelay for more than 2 miliseconds, so we
should use mdelay instead for those.
Signed-off-by: Arnd Bergmann <a class="moz-txt-link-rfc2396E" href="mailto:arnd@arndb.de"><arnd@arndb.de></a>
Cc: David Airlie <a class="moz-txt-link-rfc2396E" href="mailto:airlied@linux.ie"><airlied@linux.ie></a>
Cc: Ben Skeggs <a class="moz-txt-link-rfc2396E" href="mailto:bskeggs@redhat.com"><bskeggs@redhat.com></a>
Cc: <a class="moz-txt-link-abbreviated" href="mailto:dri-devel@lists.freedesktop.org">dri-devel@lists.freedesktop.org</a>
---
drivers/gpu/drm/nouveau/core/engine/disp/dacnv50.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/nouveau/core/engine/disp/dacnv50.c b/drivers/gpu/drm/nouveau/core/engine/disp/dacnv50.c
index d0817d9..ed7415e 100644
--- a/drivers/gpu/drm/nouveau/core/engine/disp/dacnv50.c
+++ b/drivers/gpu/drm/nouveau/core/engine/disp/dacnv50.c
@@ -51,7 +51,8 @@ nv50_dac_sense(struct nv50_disp_priv *priv, int or, u32 loadval)
const u32 doff = (or * 0x800);
int load = -EINVAL;
nv_wr32(priv, 0x61a00c + doff, 0x00100000 | loadval);
- udelay(9500);
+ mdelay(9);
+ udelay(500);
nv_wr32(priv, 0x61a00c + doff, 0x80000000);
load = (nv_rd32(priv, 0x61a00c + doff) & 0x38000000) >> 27;
nv_wr32(priv, 0x61a00c + doff, 0x00000000);
</pre>
</blockquote>
<br>
<div class="moz-signature">-- <br>
<span style="font-size: 11px; color: #181818;">Roy Spliet BSc.</span><br>
<span style="font-size: 11px; color: #606060;">
MSc. Student<br>
Delft University of Technology<br>
<a href="http://www.pds.ewi.tudelft.nl/msc/mallocinopencl/">http://www.pds.ewi.tudelft.nl/msc/mallocinopencl/</a>
</span></div>
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