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<b><a class="bz_bug_link
bz_status_NEW "
title="NEW --- - radeonsi purple tinted colors"
href="https://bugs.freedesktop.org/show_bug.cgi?id=71647#c2">Comment # 2</a>
on <a class="bz_bug_link
bz_status_NEW "
title="NEW --- - radeonsi purple tinted colors"
href="https://bugs.freedesktop.org/show_bug.cgi?id=71647">bug 71647</a>
from <span class="vcard"><a class="email" href="mailto:tstellar@gmail.com" title="Tom Stellard <tstellar@gmail.com>"> <span class="fn">Tom Stellard</span></a>
</span></b>
<pre>Can you bisect this? It's possible that this commit is responsible:
R600/SI: Prefer SALU instructions for bit shift operations
All shift operations will be selected as SALU instructions and then
if necessary lowered to VALU instructions in the SIFixSGPRCopies pass.
This allows us to do more operations on the SALU which will improve
performance and is also required for implementing private memory
using indirect addressing, since the private memory pointers must stay
in the scalar registers.
This patch includes some fixes from Matt Arsenault.
git-svn-id: <a href="https://llvm.org/svn/llvm-project/llvm/trunk@194625">https://llvm.org/svn/llvm-project/llvm/trunk@194625</a>
91177308-0d34-0410-b5e6-96231b3b80d8</pre>
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