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<b><a class="bz_bug_link
bz_status_NEW "
title="NEW --- - Implement VGPR Register Spilling"
href="https://bugs.freedesktop.org/show_bug.cgi?id=75276#c31">Comment # 31</a>
on <a class="bz_bug_link
bz_status_NEW "
title="NEW --- - Implement VGPR Register Spilling"
href="https://bugs.freedesktop.org/show_bug.cgi?id=75276">bug 75276</a>
from <span class="vcard"><a class="email" href="mailto:michel@daenzer.net" title="Michel Dänzer <michel@daenzer.net>"> <span class="fn">Michel Dänzer</span></a>
</span></b>
<pre>(In reply to <a href="show_bug.cgi?id=75276#c30">comment #30</a>)
<span class="quote">> But every demo segfaults. Mostly in LLVMBuildBitCast().</span >
[...]
<span class="quote">> This is still a problem with register spilling that just looks different,
> right?</span >
No, that sounds like <a class="bz_bug_link
bz_status_NEW "
title="NEW --- - TGSI constant buffer overrun causes LLVM assertion failure"
href="show_bug.cgi?id=81834">bug 81834</a>.</pre>
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