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<b><a class="bz_bug_link
bz_status_NEW "
title="NEW - r600g+nine: Bioshock shader failure after 7b1c0cbc90d456384b0950ad21faa3c61a6b43ff"
href="https://bugs.freedesktop.org/show_bug.cgi?id=85696#c5">Comment # 5</a>
on <a class="bz_bug_link
bz_status_NEW "
title="NEW - r600g+nine: Bioshock shader failure after 7b1c0cbc90d456384b0950ad21faa3c61a6b43ff"
href="https://bugs.freedesktop.org/show_bug.cgi?id=85696">bug 85696</a>
from <span class="vcard"><a class="email" href="mailto:imirkin@alum.mit.edu" title="Ilia Mirkin <imirkin@alum.mit.edu>"> <span class="fn">Ilia Mirkin</span></a>
</span></b>
<pre>(In reply to David Heidelberg (okias) from <a href="show_bug.cgi?id=85696#c4">comment #4</a>)
<span class="quote">> It's bug in Nine.
>
> Instead of one available ADDR[0], we try use DCL ADDR[0..1].
>
> ADDR[0] is allocated by LOOP (for counter purposes) and then later is
> allocated ADDR[1].
>
> 0 is the address register (already allocated by LOOP, but in this case
> unused)
> 1 is UBO index register (misused by location for MOVA (coverted)-> ARR)
> 2 is sampler index register (not used, correctly).</span >
While the opengl state tracker uses ADDR in this way, it is not in any way
required by TGSI or gallium that this be the case. ADDR registers can be used
however you want, they're just registers like any other, except that they can
be used for indirect indexing into TEMP and CONST registers (perhaps IN and OUT
as well, not sure), and with ARB_gs5, into SAMP as well.</pre>
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