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        <tr>
          <th>Bug ID</th>
          <td><a class="bz_bug_link 
          bz_status_NEW "
   title="NEW - [radeonsi][regression,bisected] Depth test/buffer issues in Portal"
   href="https://bugs.freedesktop.org/show_bug.cgi?id=88561">88561</a>
          </td>
        </tr>

        <tr>
          <th>Summary</th>
          <td>[radeonsi][regression,bisected] Depth test/buffer issues in Portal
          </td>
        </tr>

        <tr>
          <th>Product</th>
          <td>Mesa
          </td>
        </tr>

        <tr>
          <th>Version</th>
          <td>git
          </td>
        </tr>

        <tr>
          <th>Hardware</th>
          <td>Other
          </td>
        </tr>

        <tr>
          <th>OS</th>
          <td>All
          </td>
        </tr>

        <tr>
          <th>Status</th>
          <td>NEW
          </td>
        </tr>

        <tr>
          <th>Severity</th>
          <td>normal
          </td>
        </tr>

        <tr>
          <th>Priority</th>
          <td>medium
          </td>
        </tr>

        <tr>
          <th>Component</th>
          <td>Drivers/Gallium/radeonsi
          </td>
        </tr>

        <tr>
          <th>Assignee</th>
          <td>dri-devel@lists.freedesktop.org
          </td>
        </tr>

        <tr>
          <th>Reporter</th>
          <td>daniel@constexpr.org
          </td>
        </tr></table>
      <p>
        <div>
        <pre>Created <span class=""><a href="attachment.cgi?id=112428" name="attach_112428" title="Bad frame">attachment 112428</a> <a href="attachment.cgi?id=112428&action=edit" title="Bad frame">[details]</a></span>
Bad frame

With current Mesa master (commit 461103ef64858e9d81073fad1bd8222b70b2754b),
(some) background geometry will be randomly drawn above foreground for some
frames in Portal (also observed in the Portal mod Rexaura). It does not happen
often and the same scene may be fine depending on what was loaded before or
just randomness.

Bisecting blames commit 02ba7334d35cf8182048c17a149b16f18104c6bf
Author: Marek Olšák <<a href="mailto:marek.olsak@amd.com">marek.olsak@amd.com</a>>
Date:   Sun Jan 4 22:16:53 2015 +0100

    radeonsi: don't use TC L2 for updating descriptors on SI

    It's causing problems, because we mix uncached CP DMA with cached
WRITE_DATA
    when updating the same memory.

    The solution for SI is to use uncached access here, because CP DMA doesn't
    support cached access.

    CIK will be handled in the next patch.

    Reviewed-by: Michel Dänzer <<a href="mailto:michel.daenzer@amd.com">michel.daenzer@amd.com</a>>

Simply reverting this commit on master causes other rendering issues.

GPU: Radeon HD 7950 (OpenGL renderer string: Gallium 0.4 on AMD TAHITI)
LLVM compiled from svn last week (r225584)
GCC: 4.8.4
Kernel: Linux 3.18.2-gentoo
Distro: Gentoo</pre>
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