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<b><a class="bz_bug_link
bz_status_NEW "
title="NEW - [drm:radeon_uvd_send_upll_ctlreq] *ERROR* Timeout setting UVD clocks!"
href="https://bugs.freedesktop.org/show_bug.cgi?id=73378#c28">Comment # 28</a>
on <a class="bz_bug_link
bz_status_NEW "
title="NEW - [drm:radeon_uvd_send_upll_ctlreq] *ERROR* Timeout setting UVD clocks!"
href="https://bugs.freedesktop.org/show_bug.cgi?id=73378">bug 73378</a>
from <span class="vcard"><a class="email" href="mailto:adonai@xaker.ru" title="Chernovsky Oleg <adonai@xaker.ru>"> <span class="fn">Chernovsky Oleg</span></a>
</span></b>
<pre>(In reply to Christian König from <a href="show_bug.cgi?id=73378#c27">comment #27</a>)
<span class="quote">> >
> > [ 2.237380] [drm] At call 1
> > [ 3.278457] [drm] At call 2
> > [ 3.288474] [drm] Passed!
>
> Well just that I got it right: The first call runs into an error, but after
> issuing the reset and reprogramming everything the second call succeeds?</span >
Yep, the DRM_INFO was at the "break" line in a loop of
radeon_uvd_send_upll_ctlreq.
<span class="quote">>
> In this case I would just speculate that somebody (the BIOS?) programmed the
> PLL with such incorrect values that it locked up and need a reset to work
> properly again.
>
> Can you just reduce the first call to radeon_uvd_send_upll_ctlreq to a
> warning and continue? If the second call works we have successfully
> programmed the PLL and everything is fine.</span >
But does it differ from previous behaviour when both calls were reduced to
return success even on timeout? Could the first call lock PLL somehow?
I'll try again today.</pre>
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