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<b><a class="bz_bug_link
bz_status_NEW "
title="NEW - [drm:radeon_uvd_send_upll_ctlreq] *ERROR* Timeout setting UVD clocks!"
href="https://bugs.freedesktop.org/show_bug.cgi?id=73378#c29">Comment # 29</a>
on <a class="bz_bug_link
bz_status_NEW "
title="NEW - [drm:radeon_uvd_send_upll_ctlreq] *ERROR* Timeout setting UVD clocks!"
href="https://bugs.freedesktop.org/show_bug.cgi?id=73378">bug 73378</a>
from <span class="vcard"><a class="email" href="mailto:adonai@xaker.ru" title="Chernovsky Oleg <adonai@xaker.ru>"> <span class="fn">Chernovsky Oleg</span></a>
</span></b>
<pre>No luck. Tried various hacks and commenting return values.
Will try mmiotracing these registers from fglrx on weekend</pre>
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