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<div class="moz-cite-prefix">On 06.06.2015 19:08, Oded Gabbay wrote:<br>
</div>
<blockquote
cite="mid:CAFCwf10d8bwEswfuzPHb7SBjEUOki8FuSU+jUvfQK3YQnWHfCw@mail.gmail.com"
type="cite">
<div dir="ltr">Hi Alex,<br>
I think you have a mistake in this patch.
<div>You renamed <span
style="font-size:13.1999998092651px;line-height:19.7999992370605px">AMDGPU_GEM_CREATE_CPU_GTT_WC
to </span><span
style="line-height:19.7999992370605px;font-size:13.1999998092651px">AMDGPU_GEM_CREATE_CPU_GTT_</span><span
style="line-height:19.7999992370605px;font-size:13.1999998092651px">USWC,
however, </span><span
style="font-size:13.1999998092651px;line-height:19.7999992370605px">AMDGPU_GEM_CREATE_CPU_GTT_WC
was defined as (1 << 3) and </span><span
style="line-height:19.7999992370605px;font-size:13.1999998092651px">AMDGPU_GEM_CREATE_CPU_GTT_</span><span
style="line-height:19.7999992370605px;font-size:13.1999998092651px">USWC
is defined as (1 << 2)</span></div>
</div>
</blockquote>
<br>
That patch merged AMDGPU_GEM_CREATE_CPU_GTT_WC and
AMDGPU_GEM_CREATE_CPU_GTT_UC to AMDGPU_GEM_CREATE_CPU_GTT_USWC.<br>
<br>
So using 1 << 2 for the new value is perfectly fine.<br>
<br>
Christian.<br>
<br>
<blockquote
cite="mid:CAFCwf10d8bwEswfuzPHb7SBjEUOki8FuSU+jUvfQK3YQnWHfCw@mail.gmail.com"
type="cite">
<div dir="ltr">
<div><span
style="line-height:19.7999992370605px;font-size:13.1999998092651px"><br>
</span></div>
<div><span
style="line-height:19.7999992370605px;font-size:13.1999998092651px">Oded</span></div>
</div>
<br>
<div class="gmail_quote">
<div dir="ltr">On Wed, May 27, 2015 at 6:22 AM Alex Deucher <<a
moz-do-not-send="true" href="mailto:alexdeucher@gmail.com">alexdeucher@gmail.com</a>>
wrote:<br>
</div>
<blockquote class="gmail_quote" style="margin:0 0 0
.8ex;border-left:1px #ccc solid;padding-left:1ex">From: Jammy
Zhou <<a moz-do-not-send="true"
href="mailto:Jammy.Zhou@amd.com" target="_blank">Jammy.Zhou@amd.com</a>><br>
<br>
This flag isn't used by user mode drivers, remove it to avoid<br>
confusion. And rename GTT_WC to GTT_USWC to make it clear.<br>
<br>
Signed-off-by: Jammy Zhou <<a moz-do-not-send="true"
href="mailto:Jammy.Zhou@amd.com" target="_blank">Jammy.Zhou@amd.com</a>><br>
Reviewed-by: Alex Deucher <<a moz-do-not-send="true"
href="mailto:alexander.deucher@amd.com" target="_blank">alexander.deucher@amd.com</a>><br>
---<br>
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 10 ++--------<br>
include/uapi/drm/amdgpu_drm.h | 7 ++-----<br>
2 files changed, 4 insertions(+), 13 deletions(-)<br>
<br>
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c<br>
index f5e17f9..992b7f5 100644<br>
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c<br>
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c<br>
@@ -132,10 +132,7 @@ void
amdgpu_ttm_placement_from_domain(struct amdgpu_bo *rbo, u32
domain)<br>
}<br>
<br>
if (domain & AMDGPU_GEM_DOMAIN_GTT) {<br>
- if (rbo->flags &
AMDGPU_GEM_CREATE_CPU_GTT_UC) {<br>
- rbo->placements[c].fpfn = 0;<br>
- rbo->placements[c++].flags =
TTM_PL_FLAG_UNCACHED | TTM_PL_FLAG_TT;<br>
- } else if (rbo->flags &
AMDGPU_GEM_CREATE_CPU_GTT_WC) {<br>
+ if (rbo->flags &
AMDGPU_GEM_CREATE_CPU_GTT_USWC) {<br>
rbo->placements[c].fpfn = 0;<br>
rbo->placements[c++].flags =
TTM_PL_FLAG_WC | TTM_PL_FLAG_TT |<br>
TTM_PL_FLAG_UNCACHED;<br>
@@ -146,10 +143,7 @@ void
amdgpu_ttm_placement_from_domain(struct amdgpu_bo *rbo, u32
domain)<br>
}<br>
<br>
if (domain & AMDGPU_GEM_DOMAIN_CPU) {<br>
- if (rbo->flags &
AMDGPU_GEM_CREATE_CPU_GTT_UC) {<br>
- rbo->placements[c].fpfn = 0;<br>
- rbo->placements[c++].flags =
TTM_PL_FLAG_UNCACHED | TTM_PL_FLAG_SYSTEM;<br>
- } else if (rbo->flags &
AMDGPU_GEM_CREATE_CPU_GTT_WC) {<br>
+ if (rbo->flags &
AMDGPU_GEM_CREATE_CPU_GTT_USWC) {<br>
rbo->placements[c].fpfn = 0;<br>
rbo->placements[c++].flags =
TTM_PL_FLAG_WC | TTM_PL_FLAG_SYSTEM |<br>
TTM_PL_FLAG_UNCACHED;<br>
diff --git a/include/uapi/drm/amdgpu_drm.h
b/include/uapi/drm/amdgpu_drm.h<br>
index 9e771fb..77bc574 100644<br>
--- a/include/uapi/drm/amdgpu_drm.h<br>
+++ b/include/uapi/drm/amdgpu_drm.h<br>
@@ -73,15 +73,12 @@<br>
#define AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED (1 << 0)<br>
/* Flag that CPU access will not work, this VRAM domain is
invisible */<br>
#define AMDGPU_GEM_CREATE_NO_CPU_ACCESS (1
<< 1)<br>
-/* Flag that un-cached attributes should be used for GTT */<br>
-#define AMDGPU_GEM_CREATE_CPU_GTT_UC (1 << 2)<br>
/* Flag that USWC attributes should be used for GTT */<br>
-#define AMDGPU_GEM_CREATE_CPU_GTT_WC (1 << 3)<br>
+#define AMDGPU_GEM_CREATE_CPU_GTT_USWC (1 << 2)<br>
<br>
/* Flag mask for GTT domain_flags */<br>
#define AMDGPU_GEM_CREATE_CPU_GTT_MASK \<br>
- (AMDGPU_GEM_CREATE_CPU_GTT_WC | \<br>
- AMDGPU_GEM_CREATE_CPU_GTT_UC | \<br>
+ (AMDGPU_GEM_CREATE_CPU_GTT_USWC | \<br>
AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED | \<br>
AMDGPU_GEM_CREATE_NO_CPU_ACCESS)<br>
<br>
--<br>
1.8.3.1<br>
<br>
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