<html> <head> <base href="https://bugs.freedesktop.org/" /> </head> <body> <div> <a class="bz_bug_link bz_status_ASSIGNED " title="ASSIGNED - [SKL bisected] texsubimage pbo intermittent failures" href="https://bugs.freedesktop.org/show_bug.cgi?id=91926#c42">Comment # 42</a> on <a class="bz_bug_link bz_status_ASSIGNED " title="ASSIGNED - [SKL bisected] texsubimage pbo intermittent failures" href="https://bugs.freedesktop.org/show_bug.cgi?id=91926">bug 91926</a> from <a class="email" href="mailto:topi.pohjolainen@intel.com" title="Topi Pohjolainen <topi.pohjolainen@intel.com>"> Topi Pohjolainen</a> <pre>(In reply to Topi Pohjolainen from <a href="show_bug.cgi?id=91926#c39">comment #39</a>) > In workarounds I found the following: > > "For Gen6 and Gen7, any time a pipeline flush is used it needs to be > followed by eight (8) separate storeDW commands. This is done as a > workaround to a known issue where the pipeline flush does not push all > cycles to the "GO" point. The storeDWs will not accomplish this process > but will create enough stall time to ensure all cycles are at GO prior > to execution of the next buffer or part of the buffer. This is required > for producer/consumer model." > > I don't exactly know to what "storeDW" refers here and I added in > brw_emit_mi_flush() after the flush: > > for (unsigned i = 0; i < 8; ++i) > brw_emit_pipe_control_write(brw, PIPE_CONTROL_WRITE_IMMEDIATE, > brw->workaround_bo, 0, 0, 0); > > (which writes in fact 8 times qwords). > > This at least doesn't make any difference either on IVB or SKL. Also just tried using MI_STORE_DATA_IMM instead of pipe control command - doesn't help on IVB.</pre> </div> <hr> You are receiving this mail because: <ul> <li>You are the QA Contact for the bug.</li> </ul> </body> </html>