<html>
<head>
<base href="https://bugs.freedesktop.org/" />
</head>
<body><table border="1" cellspacing="0" cellpadding="8">
<tr>
<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW - [SNB, regression, dEQP] deqp-gles3.functional.shaders.discard.dynamic_loop_texture"
href="https://bugs.freedesktop.org/show_bug.cgi?id=92770">92770</a>
</td>
</tr>
<tr>
<th>Summary</th>
<td>[SNB, regression, dEQP] deqp-gles3.functional.shaders.discard.dynamic_loop_texture
</td>
</tr>
<tr>
<th>Product</th>
<td>Mesa
</td>
</tr>
<tr>
<th>Version</th>
<td>git
</td>
</tr>
<tr>
<th>Hardware</th>
<td>x86-64 (AMD64)
</td>
</tr>
<tr>
<th>OS</th>
<td>Linux (All)
</td>
</tr>
<tr>
<th>Status</th>
<td>NEW
</td>
</tr>
<tr>
<th>Severity</th>
<td>normal
</td>
</tr>
<tr>
<th>Priority</th>
<td>medium
</td>
</tr>
<tr>
<th>Component</th>
<td>Drivers/DRI/i965
</td>
</tr>
<tr>
<th>Assignee</th>
<td>idr@freedesktop.org
</td>
</tr>
<tr>
<th>Reporter</th>
<td>mark.a.janes@intel.com
</td>
</tr>
<tr>
<th>QA Contact</th>
<td>intel-3d-bugs@lists.freedesktop.org
</td>
</tr></table>
<p>
<div>
<pre>This dEQP test fails at the following commit:
Author: Connor Abbott <<a href="mailto:cwabbott0@gmail.com">cwabbott0@gmail.com</a>>
AuthorDate: Sat Jun 6 13:32:21 2015 -0400
Commit: Connor Abbott <<a href="mailto:cwabbott0@gmail.com">cwabbott0@gmail.com</a>>
CommitDate: Fri Oct 30 02:19:00 2015 -0400
i965: always run the post-RA scheduler
Before, we would only do scheduling after register allocation if we
spilled, despite the fact that the pre-RA scheduler was only supposed to
be for register pressure and set the latencies of every instruction to
1. This meant that unless we spilled, which we rarely do, then we never
considered instruction latencies at all, and we usually never bothered
to try and hide texture fetch latency. Although a later commit removes
the setting the latency to 1 part, we still want to always run the
post-RA scheduler since it's able to take the false dependencies that
the register allocator creates into account, and it can be more
aggressive than the pre-RA scheduler since it doesn't have to worry
about register pressure at all.
Test master post-ra-sched diff %diff
bench_OglPSBump2 396.730 402.386 5.656 +1.400%
bench_OglPSBump8 244.370 247.591 3.221 +1.300%
bench_OglPSPhong 241.117 242.002 0.885 +0.300%
bench_OglPSPom 59.555 59.725 0.170 +0.200%
bench_OglShMapPcf 86.149 102.346 16.197 +18.800%
bench_OglVSTangent 388.849 395.489 6.640 +1.700%
bench_trex 65.471 65.862 0.390 +0.500%
bench_trexoff 69.562 70.150 0.588 +0.800%
bench_heaven 25.179 25.254 0.074 +0.200%
Reviewed-by: Jason Ekstrand <<a href="mailto:jasoan.ekstrand@intel.com">jasoan.ekstrand@intel.com</a>>
Sample test output:
Standard Output
/tmp/build_root/m64/opt/deqp/modules/gles3/deqp-gles3
--deqp-case=dEQP-GLES3.functional.shaders.discard.dynamic_loop_texture
--deqp-surface-type=fbo --deqp-log-images=disable --deqp-surface-width=256
--deqp-surface-height=256
dEQP Core 2014.x (0xcafebabe) starting..
target implementation = 'DRM'
Test case 'dEQP-GLES3.functional.shaders.discard.dynamic_loop_texture'..
Vertex shader compile time = 5.244000 ms
Fragment shader compile time = 0.635000 ms
Link time = 5.734000 ms
Test case duration in microseconds = 254539 us
Fail (Fail)
DONE!
Test run totals:
Passed: 0/1 (0.0%)
Failed: 1/1 (100.0%)
Not supported: 0/1 (0.0%)
Warnings: 0/1 (0.0%)</pre>
</div>
</p>
<hr>
<span>You are receiving this mail because:</span>
<ul>
<li>You are the QA Contact for the bug.</li>
</ul>
</body>
</html>