<html> <head> <base href="https://bugs.freedesktop.org/" /> </head> <body> <div> <a class="bz_bug_link bz_status_NEW " title="NEW --- - [GM965/GL960] external monitor flickering with red stripes" href="https://bugs.freedesktop.org/show_bug.cgi?id=56359#c15">Comment # 15</a> on <a class="bz_bug_link bz_status_NEW " title="NEW --- - [GM965/GL960] external monitor flickering with red stripes" href="https://bugs.freedesktop.org/show_bug.cgi?id=56359">bug 56359</a> from <a class="email" href="mailto:daniel@ffwll.ch" title="Daniel Vetter <daniel@ffwll.ch>"> Daniel Vetter</a> <pre>(In reply to <a href="show_bug.cgi?id=56359#c14">comment #14</a>) > Not sure, but are we really doing VGA over SDVO here or could it be ADPA? If > so, ADPA is bound to the wrong pipe when the problem occurs and thus never > turns HSYNC or VSYNC off. There should be special bits for the VGA dpms state to turn of h/vsync. See intel_crt_set_dpms > I have no idea why the pipe changes yet but it wouldn't hurt setting it > again in intel_crt_set_dpms(). Would you like a patch for this or am I way > off? As long as ADPA is disabled, we should be fine (bit31) and the selected pipe (bit30) shouldn't affect anything ... I'm still confused what's going on here. The SDVO issue was a red herring, it doesn't look like it's used on your system. Another thing to try is to enable debug output with drm.debug=0xe and then grab a dmesg both when the mode switching works and when it doesn't. I suspect something in the exact ordering is slightly different, which then brings up a bug somewhere.</pre> </div> <hr> You are receiving this mail because: <ul> <li>You are the QA Contact for the bug.</li> </ul> </body> </html>