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<b><a class="bz_bug_link
bz_status_ASSIGNED "
title="ASSIGNED --- - [sna gen4] corrupt rendering (and flickering on redraw)"
href="https://bugs.freedesktop.org/show_bug.cgi?id=55500#c96">Comment # 96</a>
on <a class="bz_bug_link
bz_status_ASSIGNED "
title="ASSIGNED --- - [sna gen4] corrupt rendering (and flickering on redraw)"
href="https://bugs.freedesktop.org/show_bug.cgi?id=55500">bug 55500</a>
from <span class="vcard"><a class="email" href="mailto:chris@chris-wilson.co.uk" title="Chris Wilson <chris@chris-wilson.co.uk>"> <span class="fn">Chris Wilson</span></a>
</span></b>
<pre>(In reply to <a href="show_bug.cgi?id=55500#c93">comment #93</a>)
<span class="quote">> The bad part is - while before I've been getting 3.7Mchar/s in x11perf
> -aa10text - now it's like 1.3Mchar/s so significantly slower.</span >
That's the sacrifice, we have to stop sending commands to the GPU and wait for
it complete those in flight (quite frequently). Or else new rectangles
overwrite vertex entries still being used by later entries
<span class="quote">> So the question here would be - isn't the corruption based on triangle
> surface size ? So i.e. GPU is able to process a lot of small ones - but has
> bug with bigger ones ?
>
> Maybe a cheap test would be to flush when some longer triangle edge is
> pushed in ?</span >
Not really, you have to predict when a VUE being used by the end of the
pipeline will be overwritten by a new rectangle at the start of the pipeline.
This is completely internal state - the primitive command we want to feed to
the GPU can contains thousands of rectangles. Instead of counting rectangles,
you want to start counting fragments (actually texel reads since that will be
the ratelimiting factor) and flush if we queue up too much work for the GPU. If
you also model how fast the gpu is retiring fragments so that you can predict
how much work is in flight, you could further reduce flushes...
We still need to stop the gpu and wait for it to complete. No matter how finely
you do it, it will sacrifice throughput and latency.
It's a workaround. I still live in hope that after all these years we missed
some configuration detail required for gen4.</pre>
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