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<base href="https://bugs.freedesktop.org/" />
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<th>Priority</th>
<td>medium
</td>
</tr>
<tr>
<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW --- - [Baytrail-M] testdisplay with two pipes cause "*ERROR* DPLL 0 failed to lock" and "Call trace""
href="https://bugs.freedesktop.org/show_bug.cgi?id=69917">69917</a>
</td>
</tr>
<tr>
<th>CC</th>
<td>intel-gfx-bugs@lists.freedesktop.org
</td>
</tr>
<tr>
<th>Assignee</th>
<td>intel-gfx-bugs@lists.freedesktop.org
</td>
</tr>
<tr>
<th>Summary</th>
<td>[Baytrail-M] testdisplay with two pipes cause "*ERROR* DPLL 0 failed to lock" and "Call trace"
</td>
</tr>
<tr>
<th>QA Contact</th>
<td>intel-gfx-bugs@lists.freedesktop.org
</td>
</tr>
<tr>
<th>Severity</th>
<td>major
</td>
</tr>
<tr>
<th>Classification</th>
<td>Unclassified
</td>
</tr>
<tr>
<th>OS</th>
<td>All
</td>
</tr>
<tr>
<th>Reporter</th>
<td>yangweix.shui@intel.com
</td>
</tr>
<tr>
<th>Hardware</th>
<td>Other
</td>
</tr>
<tr>
<th>Status</th>
<td>NEW
</td>
</tr>
<tr>
<th>Version</th>
<td>unspecified
</td>
</tr>
<tr>
<th>Component</th>
<td>DRM/Intel
</td>
</tr>
<tr>
<th>Product</th>
<td>DRI
</td>
</tr></table>
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<div>
<pre>Created <span class=""><a href="attachment.cgi?id=86779" name="attach_86779" title="dmesg: testdisplay cause error and call trace">attachment 86779</a> <a href="attachment.cgi?id=86779&action=edit" title="dmesg: testdisplay cause error and call trace">[details]</a></span>
dmesg: testdisplay cause error and call trace
Environment:
----------------------
Kernel: (drm-intel-next-queued)6d87c504b91510f6e3e933a9ee795e08bcb26a0d
Author: Jesse Barnes <<a href="mailto:jbarnes@virtuousgeek.org">jbarnes@virtuousgeek.org</a>>
Date: Fri Sep 27 10:40:54 2013 -0700
drm/i915/vlv: reduce GT FIFO error info to a debug message
Description:
-----------------------
When both VGA and eDP plugged in, run testdisplay, eDP is good to display, but
while switching to VGA, the process will be stuck at the first mode of VGA.
Then check out the dmesg, there's Error and call trace in it. I have tested
many older kernels and can't find a good commit, it's not a regression.
Testdisplay works well if we only plugged in one pipe. Our baytrail only
support eDP and VGA.
It's an unique issue on Baytrail.
Error:
-----------------------
[ 186.312961] [drm:intel_edp_psr_match_conditions], PSR not supported on this
p
latform
[ 186.312970] [drm:intel_crtc_mode_set], [ENCODER:10:DAC-10] set
[MODE:0:1680x1
050]
[ 186.316857] [drm:vlv_enable_pll] *ERROR* DPLL 0 failed to lock
[ 186.317531] [drm:g4x_check_srwm], SR watermark: display plane 107, cursor 6
[ 186.317537] [drm:g4x_check_srwm], SR watermark: display plane 212, cursor 10
[ 186.317543] [drm:valleyview_update_wm], Setting FIFO watermarks - A:
plane=93, cursor=6, B: plane=2, cursor=2, SR: plane=107, cursor=10
[ 186.368849] [drm:ironlake_wait_for_vblank], vblank wait timed out
Call Trace:
----------------------
There's three kind of call trace, please see them from dmesg.</pre>
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