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<b><a class="bz_bug_link
bz_status_NEW "
title="NEW --- - SNA causes GPU hung on IBM X30 intel 82830 chipset."
href="https://bugs.freedesktop.org/show_bug.cgi?id=70727#c2">Comment # 2</a>
on <a class="bz_bug_link
bz_status_NEW "
title="NEW --- - SNA causes GPU hung on IBM X30 intel 82830 chipset."
href="https://bugs.freedesktop.org/show_bug.cgi?id=70727">bug 70727</a>
from <span class="vcard"><a class="email" href="mailto:chris@chris-wilson.co.uk" title="Chris Wilson <chris@chris-wilson.co.uk>"> <span class="fn">Chris Wilson</span></a>
</span></b>
<pre>Please apply
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 76e54352111e..d10a0c3156f1 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1740,7 +1740,7 @@ struct drm_i915_file_private {
#define OVERLAY_NEEDS_PHYSICAL(dev)
(INTEL_INFO(dev)->overlay_needs_physical)
/* Early gen2 have a totally busted CS tlb and require pinned batches. */
-#define HAS_BROKEN_CS_TLB(dev) (IS_I830(dev) || IS_845G(dev))
+#define HAS_BROKEN_CS_TLB(dev) (0)
/* With the 945 and later, Y tiling got adjusted so that it was 32 128-byte
* rows, which changed the alignment requirements and fence programming.
so that we can capture the right GPU dump.</pre>
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