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<b><a class="bz_bug_link
bz_status_ASSIGNED "
title="ASSIGNED --- - [snb dp hotplug] Pipe B, PCH transcoder B FIFO underrun"
href="https://bugs.freedesktop.org/show_bug.cgi?id=70254#c38">Comment # 38</a>
on <a class="bz_bug_link
bz_status_ASSIGNED "
title="ASSIGNED --- - [snb dp hotplug] Pipe B, PCH transcoder B FIFO underrun"
href="https://bugs.freedesktop.org/show_bug.cgi?id=70254">bug 70254</a>
from <span class="vcard"><a class="email" href="mailto:crshman@gmail.com" title="Robert N <crshman@gmail.com>"> <span class="fn">Robert N</span></a>
</span></b>
<pre>Ah yes, forgot to run that command. Once I do that the register values are
changed.
Doubling all of these numbers seems to work great. I'm trying to track down
what the minimums are, I reset everything to the defaults and I'm slowly
bumping WM0 (while keeping with WM0<=WM1<=WM2<=WM3) to see where things stop
breaking.
So far so good with this:
root@rnavarro-thinkpad:~# cat /sys/kernel/debug/dri/0/i915_pri_wm_latency;
intel_reg_read 0x45100 0x45104
WM0 10 (1.0 usec)
WM1 3 (1.5 usec)
WM2 4 (2.0 usec)
WM3 22 (11.0 usec)
0x45100 : 0x120006
0x45104 : 0x120006
WM0 7 (0.7 usec) --> WM0 10 (1.0 usec)
However, I'm going to keep testing to make sure that the WM0 1.0usec is solid.
Thanks for the assistance thus far, we're getting close to pinning this down!</pre>
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