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<body><span class="vcard"><a class="email" href="mailto:jinxianx.guo@intel.com" title="Guo Jinxian <jinxianx.guo@intel.com>"> <span class="fn">Guo Jinxian</span></a>
</span> changed
<a class="bz_bug_link
bz_status_ASSIGNED "
title="ASSIGNED --- - [HSW Bisected]Many subtests of igt/kms_flip fail"
href="https://bugs.freedesktop.org/show_bug.cgi?id=78268">bug 78268</a>
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<th>What</th>
<th>Removed</th>
<th>Added</th>
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<td style="text-align:right;">Status</td>
<td>NEEDINFO
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<td>ASSIGNED
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<b><a class="bz_bug_link
bz_status_ASSIGNED "
title="ASSIGNED --- - [HSW Bisected]Many subtests of igt/kms_flip fail"
href="https://bugs.freedesktop.org/show_bug.cgi?id=78268#c7">Comment # 7</a>
on <a class="bz_bug_link
bz_status_ASSIGNED "
title="ASSIGNED --- - [HSW Bisected]Many subtests of igt/kms_flip fail"
href="https://bugs.freedesktop.org/show_bug.cgi?id=78268">bug 78268</a>
from <span class="vcard"><a class="email" href="mailto:jinxianx.guo@intel.com" title="Guo Jinxian <jinxianx.guo@intel.com>"> <span class="fn">Guo Jinxian</span></a>
</span></b>
<pre>(In reply to <a href="show_bug.cgi?id=78268#c6">comment #6</a>)
<span class="quote">> (In reply to <a href="show_bug.cgi?id=78268#c5">comment #5</a>)
> > bisected on the bad hsw device.
> > 33e8465e8759077106474cbf4f3d87612c41411d is the first bad commit
> >
> > commit 33e8465e8759077106474cbf4f3d87612c41411d
> > Author: Imre Deak <<a href="mailto:imre.deak@intel.com">imre.deak@intel.com</a>>
> > AuthorDate: Fri Apr 25 13:19:05 2014 +0300
> > Commit: Daniel Vetter <<a href="mailto:daniel.vetter@ffwll.ch">daniel.vetter@ffwll.ch</a>>
> > CommitDate: Wed Apr 30 10:06:25 2014 +0200
> >
> > drm/i915: vlv: init only needed state during early power well enabling
> >
> > During the initial power well enabling on the driver init/resume path
> > we can avoid initialzing part of the HW/SW state that will be
> > initialized anyway by the subsequent init/resume code. For some steps
> > like HPD initialization this redundancy is not only an overhead but an
> > actual problem, since they can't be run this early in the overall init
> > sequence.
> >
> > Add a flag marking the init phase and skip reinitialzing state that is
> > not strictly necessary based on that.
> >
> > This is also needed by the upcoming HPD init restructuring by Thierry
> > and Daniel.
> >
> > Signed-off-by: Imre Deak <<a href="mailto:imre.deak@intel.com">imre.deak@intel.com</a>>
> > Signed-off-by: Daniel Vetter <<a href="mailto:daniel.vetter@ffwll.ch">daniel.vetter@ffwll.ch</a>>
> >
> > Revert this commit, the test result was passed.
>
> This commit doesn't affect HSW, as it changes only VLV specific parts. Maybe
> the problem you're seeing doesn't happen always resulting in an incorrect
> bisect result. Could you try testing each commit multiple times to make sure
> you don't hit the problem already before the above commit in the bisect
> sequence?</span >
Yes, the problem you're seeing doesn't happen always. I tried 20 times for each
commit, and find the first bad commit below.
5bb0c2fd8c41dbee8ada1124d625c05765cd3f02 is the first bad commit
commit 5bb0c2fd8c41dbee8ada1124d625c05765cd3f02
Author: Ben Widawsky <<a href="mailto:benjamin.widawsky@intel.com">benjamin.widawsky@intel.com</a>>
AuthorDate: Fri Apr 18 18:04:29 2014 -0300
Commit: Daniel Vetter <<a href="mailto:daniel.vetter@ffwll.ch">daniel.vetter@ffwll.ch</a>>
CommitDate: Wed Apr 30 10:06:19 2014 +0200
drm/i915/bdw: Disable idle DOP clock gating
It seems we need this at least for the current platforms we have, but
probably not later. In any event, it should cause too much harm as we do
the same thing on several other platforms.
Signed-off-by: Ben Widawsky <<a href="mailto:ben@bwidawsk.net">ben@bwidawsk.net</a>>
Signed-off-by: Rodrigo Vivi <<a href="mailto:rodrigo.vivi@gmail.com">rodrigo.vivi@gmail.com</a>>
Reviewed-by: Brad Volkin <<a href="mailto:bradley.d.volkin@intel.com">bradley.d.volkin@intel.com</a>>
Signed-off-by: Daniel Vetter <<a href="mailto:daniel.vetter@ffwll.ch">daniel.vetter@ffwll.ch</a>>
But I revert this commit and run the test again, this issue still able to
reproduce.</pre>
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