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<b><a class="bz_bug_link
bz_status_NEW "
title="NEW --- - [SNB bisected] GPU hang Linux 3.15 (Shuttle SH67, Xeon E3 1235)"
href="https://bugs.freedesktop.org/show_bug.cgi?id=79996#c5">Comment # 5</a>
on <a class="bz_bug_link
bz_status_NEW "
title="NEW --- - [SNB bisected] GPU hang Linux 3.15 (Shuttle SH67, Xeon E3 1235)"
href="https://bugs.freedesktop.org/show_bug.cgi?id=79996">bug 79996</a>
from <span class="vcard"><a class="email" href="mailto:chris@chris-wilson.co.uk" title="Chris Wilson <chris@chris-wilson.co.uk>"> <span class="fn">Chris Wilson</span></a>
</span></b>
<pre>Hmm. We clear all the bits we should be setting for snb gt1.
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 76c5e4aa4dcf..03d90e4003ee 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -5188,7 +5188,7 @@ static void gen6_init_clock_gating(struct drm_device
*dev)
/* WaSetupGtModeTdRowDispatch:snb */
if (IS_SNB_GT1(dev))
I915_WRITE(GEN6_GT_MODE,
-
_MASKED_BIT_ENABLE(GEN6_TD_FOUR_ROW_DISPATCH_DISABLE));
+ _MASKED_BIT_ENABLE(0x01ff));
ilk_init_lp_watermarks(dev);</pre>
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