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<base href="https://bugs.freedesktop.org/" />
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<body><table border="1" cellspacing="0" cellpadding="8">
<tr>
<th>Priority</th>
<td>medium
</td>
</tr>
<tr>
<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW --- - [HSW Regression] Fail to resume from S4, causing system hang (once out of 5 test circles)"
href="https://bugs.freedesktop.org/show_bug.cgi?id=82340">82340</a>
</td>
</tr>
<tr>
<th>Keywords</th>
<td>bisect_pending
</td>
</tr>
<tr>
<th>CC</th>
<td>intel-gfx-bugs@lists.freedesktop.org
</td>
</tr>
<tr>
<th>Assignee</th>
<td>intel-gfx-bugs@lists.freedesktop.org
</td>
</tr>
<tr>
<th>Summary</th>
<td>[HSW Regression] Fail to resume from S4, causing system hang (once out of 5 test circles)
</td>
</tr>
<tr>
<th>QA Contact</th>
<td>intel-gfx-bugs@lists.freedesktop.org
</td>
</tr>
<tr>
<th>Severity</th>
<td>major
</td>
</tr>
<tr>
<th>Classification</th>
<td>Unclassified
</td>
</tr>
<tr>
<th>OS</th>
<td>All
</td>
</tr>
<tr>
<th>Reporter</th>
<td>ming.yao@intel.com
</td>
</tr>
<tr>
<th>Hardware</th>
<td>x86-64 (AMD64)
</td>
</tr>
<tr>
<th>Status</th>
<td>NEW
</td>
</tr>
<tr>
<th>Version</th>
<td>unspecified
</td>
</tr>
<tr>
<th>Component</th>
<td>DRM/Intel
</td>
</tr>
<tr>
<th>Product</th>
<td>DRI
</td>
</tr></table>
<p>
<div>
<pre>==System Environment==
--------------------------
Regression: Yes.
Good commit: commit e1255d4cde1881345b2f68a39a96a995607b70e9
Author: Ville Syrjälä <<a href="mailto:ville.syrjala@linux.intel.com">ville.syrjala@linux.intel.com</a>>
Date: Sat Jun 28 02:04:03 2014 +0300
drm/i915: Clarify CHV swing margin/deemph bits
Non-working platforms: HSW
==kernel==
--------------------------
-nightly: (test fails)
commit c3b4c0436dffd0a2d25d9583bd6c3e64f5090603
Author: Daniel Vetter <<a href="mailto:daniel.vetter@ffwll.ch">daniel.vetter@ffwll.ch</a>>
AuthorDate: Thu Aug 7 16:50:48 2014 +0200
Commit: Daniel Vetter <<a href="mailto:daniel.vetter@ffwll.ch">daniel.vetter@ffwll.ch</a>>
CommitDate: Thu Aug 7 16:50:48 2014 +0200
drm-intel-nightly: 2014y-08m-07d-16h-50m-27s integration manifest
-queued: (test fails in the same way)
commit 9de1683a0fa8ce9dc569bafd04f7487c8b9080ac
Author: Gajanan Bhat <<a href="mailto:gajanan.bhat@intel.com">gajanan.bhat@intel.com</a>>
AuthorDate: Thu Aug 7 17:03:30 2014 +0530
Commit: Daniel Vetter <<a href="mailto:daniel.vetter@ffwll.ch">daniel.vetter@ffwll.ch</a>>
CommitDate: Thu Aug 7 15:01:53 2014 +0200
drm/i915: Add sprite watermark programming for VLV and CHV
-fixes: (test fails in the same way)
commit 7badbebb052ab30806289a4d4d35f35a7c4240d1
Author: Jiri Kosina <<a href="mailto:jkosina@suse.cz">jkosina@suse.cz</a>>
AuthorDate: Thu Aug 7 16:29:53 2014 +0200
Commit: Daniel Vetter <<a href="mailto:daniel.vetter@ffwll.ch">daniel.vetter@ffwll.ch</a>>
CommitDate: Thu Aug 7 16:49:57 2014 +0200
drm/i915: read HEAD register back in init_ring_common() to enforce ordering
==Bug detailed description==
-----------------------------
System fails to resume from S4. Dmesg from netconsole is attached.
But if rmmoded i915, S4 works well for at least 20 times
==Reproduce steps==
----------------------------
for ((i=0; i<20; i++))
do
echo 0 > /sys/class/rtc/rtc0/wakealarm
echo +15 > /sys/class/rtc/rtc0/wakealarm
echo disk > /sys/power/state
done</pre>
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