<html> <head> <base href="https://bugs.freedesktop.org/" /> </head> <body> <div> <a class="bz_bug_link bz_status_NEEDINFO " title="NEEDINFO - PSR screen freeze after modesetting" href="https://bugs.freedesktop.org/show_bug.cgi?id=91436#c23">Comment # 23</a> on <a class="bz_bug_link bz_status_NEEDINFO " title="NEEDINFO - PSR screen freeze after modesetting" href="https://bugs.freedesktop.org/show_bug.cgi?id=91436">bug 91436</a> from <a class="email" href="mailto:ivan.mitev@gmail.com" title="ivan <ivan.mitev@gmail.com>"> ivan</a> <pre>So - I tried a kernel with the debug patch reverted but kept the part below, and there's indeed no intermittent freeze. Hope this helps... diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c index 8d744c3..9ccf988 100644 --- a/drivers/gpu/drm/i915/intel_psr.c +++ b/drivers/gpu/drm/i915/intel_psr.c @@ -258,8 +258,8 @@ static void hsw_psr_enable_source(struct intel_dp *intel_dp) if (intel_dp->psr_dpcd[1] & DP_PSR_NO_TRAIN_ON_EXIT) { /* It doesn't mean we shouldn't send TPS patters, so let's send the minimal TP1 possible and skip TP2. */ - val |= EDP_PSR_TP1_TIME_100us; - val |= EDP_PSR_TP2_TP3_TIME_0us; + // val |= EDP_PSR_TP1_TIME_100us; + //val |= EDP_PSR_TP2_TP3_TIME_0us; /* Sink should be able to train with the 5 or 6 idle patterns */ idle_frames += 4; }</pre> </div> <hr> You are receiving this mail because: <ul> <li>You are the QA Contact for the bug.</li> <li>You are on the CC list for the bug.</li> </ul> </body> </html>