[Intel-gfx] [PATCH] Enable tiling for DRI2 back/depth buffers.

[Eric Anholt]

This results in allocation overhead for small (8x8-128x128 or so) pixmaps with
DRI2, but we're interested in looking at tiling them in general in the near
future, anyway.
---
 src/i830_accel.c |    4 ++++
 src/i830_dri.c   |   24 ++++++++++++++++++++++++
 2 files changed, 28 insertions(+), 0 deletions(-)

diff --git a/src/i830_accel.c b/src/i830_accel.c
index c01076a..7dff714 100644
--- a/src/i830_accel.c
+++ b/src/i830_accel.c
@@ -337,6 +337,10 @@ I830AccelInit(ScreenPtr pScreen)
 	pI830->accel_max_x = 2048;
 	pI830->accel_max_y = 2048;
     }
+    /* Bump the pitch so that we can tile any pixmap we create. */
+    if (pI830->directRenderingType >= DRI_DRI2)
+	pI830->accel_pixmap_pitch_alignment = 512;
+
     switch (pI830->accel) {
     case ACCEL_UXA:
 #ifdef I830_USE_UXA
diff --git a/src/i830_dri.c b/src/i830_dri.c
index 9c10c99..daa3ff0 100644
--- a/src/i830_dri.c
+++ b/src/i830_dri.c
@@ -1833,6 +1833,8 @@ static DRI2BufferPtr
 I830DRI2CreateBuffers(DrawablePtr pDraw, unsigned int *attachments, int count)
 {
     ScreenPtr pScreen = pDraw->pScreen;
+    ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
+    I830Ptr pI830 = I830PTR(pScrn);
     DRI2BufferPtr buffers;
     dri_bo *bo;
     int i;
@@ -1860,10 +1862,32 @@ I830DRI2CreateBuffers(DrawablePtr pDraw, unsigned int *attachments, int count)
 	    pPixmap = pDepthPixmap;
 	    pPixmap->refcnt++;
 	} else {
+	    uint32_t tiling = I915_TILING_NONE;
+
 	    pPixmap = (*pScreen->CreatePixmap)(pScreen,
 					       pDraw->width,
 					       pDraw->height,
 					       pDraw->depth, 0);
+	    switch (attachments[i]) {
+	    case DRI2BufferDepth:
+		if (IS_I965G(pI830))
+		    tiling = I915_TILING_Y;
+		else
+		    tiling = I915_TILING_X;
+		break;
+	    case DRI2BufferFakeFrontLeft:
+	    case DRI2BufferFakeFrontRight:
+	    case DRI2BufferBackLeft:
+	    case DRI2BufferBackRight:
+		    tiling = I915_TILING_X;
+		break;
+	    }
+
+	    if (tiling != I915_TILING_NONE) {
+		bo = i830_get_pixmap_bo(pPixmap);
+		drm_intel_bo_set_tiling(bo, &tiling,
+					pDraw->width * pDraw->bitsPerPixel / 8);
+	    }
 	}
 
 	if (attachments[i] == DRI2BufferDepth)
-- 
1.5.6.5