[Intel-gfx] [PATCH 1/2] drm/i915: Use same DPLL calculation logic to calculate the LVDS downclock and normal clock

yakui.zhao at intel.com yakui.zhao at intel.com
Tue Dec 15 14:13:51 CET 2009


From: Zhao Yakui <yakui.zhao at intel.com>

Now when the reduced downclock is found for LVDS, we will use find_reduced_pll
callback function to calculate the corresponding DPLL parameter(M/N/P)for
reduced downclock. In this function we will use the dividor factor(P) obtained 
for the normal clock to calculate the DPLL parameter(M/N). It is not
appropriate.

According to the spec only one M/N/P combination is appropriate for one given
clock regardless of normal clock or reduced downclock. This M/N/P combination
is defined in one spreadsheet(Of course our code uses the find_pll callback
function to calculate the M/N/P instead of looking up it in table). In theory
we should get the same DPLL divider factor(P) for the normal clock and reduced
downclock when the LVDS reduced downclock is found on one laptop.
If we get the diferent divider factor(P) for normal clock and reduced
clock, the reduced downclock is incorrect and should be discarded.

So we should use find_pll callback to calculate the DPLL parameter for the
LVDS reduced downclock as for the normal clock.

Signed-off-by: Zhao Yakui <yakui.zhao at intel.com>
cc: Jesse Barnes <jbarnes at virtuousgeek.org>
cc: Matthew Garrett <mjg at redhat.com>
---
 drivers/gpu/drm/i915/intel_display.c |    6 ++----
 1 files changed, 2 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 279dc96..1ad2fd9 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -2906,10 +2906,8 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc,
 		return -EINVAL;
 	}
 
-	if (is_lvds && limit->find_reduced_pll &&
-			dev_priv->lvds_downclock_avail) {
-		memcpy(&reduced_clock, &clock, sizeof(intel_clock_t));
-		has_reduced_clock = limit->find_reduced_pll(limit, crtc,
+	if (is_lvds && dev_priv->lvds_downclock_avail) {
+		has_reduced_clock = limit->find_pll(limit, crtc,
 							    dev_priv->lvds_downclock,
 							    refclk,
 							    &reduced_clock);
-- 
1.5.4.5




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