[Intel-gfx] [PATCH] support tiled rendering in 2D driver
jbarnes at virtuousgeek.org
Mon Jan 26 17:18:31 PST 2009
On Monday, January 26, 2009 5:14 pm Jesse Barnes wrote:
> On Friday, January 23, 2009 5:57 pm Eric Anholt wrote:
> > On Fri, 2009-01-23 at 16:24 -0800, Eric Anholt wrote:
> > > On Fri, 2009-01-23 at 14:15 -0800, Jesse Barnes wrote:
> > > > Set alignments, tile settings and flags correctly in the 2D driver to
> > > > support tiled rendering. UXA's create pixmap function currently
> > > > assumes the worst about the alignment constraints; that should
> > > > probably be fixed. Some of the 1M alignment fixes could probably be
> > > > done more cleanly as well.
> > Updated version incorporating my comments. Note the XXXs. With this
> > I've seen OA go from 5.5fps to 34.7fps on my eee 901, so I think we're
> > looking pretty good once we clean a few messes up. I had to disable
> > TILING_Y to get correct rendering with OA, which we should probably look
> > into.
> > From 1d9cda617f29badf50584bafa42ea597f1a5b27d Mon Sep 17 00:00:00 2001
> > From: Jesse Barnes <jbarnes at virtuousgeek.org>
> > Date: Fri, 23 Jan 2009 14:15:26 -0800
> > Subject: [PATCH] Support tiled back/depth on 915-class hardware with
> > DRI2.
> > Set alignments, tile settings and flags correctly in the 2D driver to
> > support tiled rendering. UXA's create pixmap function currently assumes
> > the worst about the alignment constraints; that should probably be fixed.
> > Some of the 1M alignment fixes could probably be done more cleanly as
> > well.
> Ok this one should be a little cleaner. I just removed the alignment
> passing in create_pixmap since we don't use it anyway. As for size &
> stride, we can probably calculate that in the kernel given the object's
> tiling mode, but then our obj->size wouldn't match reality (right now I
> think it give an accurate view of aperture space required for an object,
> might be a pain to lose that).
> Testers welcome on this patchset (the libdrm portion hasn't changed); hope
> we can get it pushed upstream soon.
oh and I also looked a little more into what it would take to do Y-tiling on
pre-965. The BLT engine on those chips only supports X tiled blits, so we'd
need to fix mesa to only use 3D commands for front/back/etc. copies to get it
working. Would be fun to do it and see how much of a perf. win it is...
Jesse Barnes, Intel Open Source Technology Center
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