[Intel-gfx] [PATCH] drm/i915: fix 845G FIFO size & burst length

Jesse Barnes jbarnes at virtuousgeek.org
Wed Jul 22 22:50:15 CEST 2009


On Thu, 23 Jul 2009 06:26:57 +1000
Dave Airlie <airlied at gmail.com> wrote:

> On Thu, Jul 23, 2009 at 5:54 AM, Jesse
> Barnes<jbarnes at virtuousgeek.org> wrote:
> > I had one report of flicker due to FIFO underruns on 845G.  Scott
> > was kind enough to test a few patches and report success with this
> > one. Looks like 845G measures FIFO size slightly differently than
> > other chips, and we were also clobbering the FIFO burst length.
> >  Fixing both of those issues gives him a healthy machine again.
> >
> > Note that we still only adjust plane A's watermark in the 830/845
> > case.  If someone is willing to test we could support a bigger
> > variety of dual-head 830/845 configurations with a bit more code.
> 
> I don't think 845 ever had a second pipe/plane in it.
> 
> from memory 845G and 865G were single crtc chips for desktops.

Yeah, should have just said 830M.

-- 
Jesse Barnes, Intel Open Source Technology Center



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