[Intel-gfx] [PATCH] i915: apply G45 vblank count code to all G4x chips
rnoland at 2hip.net
Tue May 5 11:50:57 PDT 2009
On Tue, 2009-05-05 at 10:44 -0700, Jesse Barnes wrote:
> On Sat, 02 May 2009 11:32:02 -0500
> Robert Noland <rnoland at 2hip.net> wrote:
> > On Fri, 2009-02-06 at 10:22 -0800, Jesse Barnes wrote:
> > > As discussed in the long thread about vblank related timeouts, it
> > > turns out GM45 has different frame count registers than previous
> > > chips. This patch adds support for them, which prevents us from
> > > waiting on really stale sequence values in drm_wait_vblank (which
> > > rather than returning immediately ends up timing out or getting
> > > interrupted).
> > I'm not seeing this patch in drm-next... It looks like this register
> > should be used for all G4X chips, not just GM45. The counter on my
> > G45 (2E22) was counting really fast using the old method. Using this
> > register the values seem correct. The docs appear to hold up this
> > argument as well I think (devELK).
> > Running gears synced to vblank was working since vblanks just stay on.
> > If vblanks are being switched on and off, (rotating the cube in
> > compiz) I was seeing really bad behavior after a few minutes.
> > Also note that in this case max_vblank_count is 32 bits, not 24. I'm
> > setting that value at the same time that I set the function now.
> Yes it should be for G4x. Patch below.
You aren't dealing with the hardware counter being 32 bits now, so once
you cross the 24 bit boundary the calculations in
drm_update_vblank_counter() will be wrong.
Robert Noland <rnoland at 2hip.net>
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