[Intel-gfx] [PATCH v2] restore render clock gating on resume

Andrew Lutomirski luto at mit.edu
Sun Nov 8 19:49:51 CET 2009

Rather than restoring just a few clock gating registers on resume,
just reinitialize the whole thing.

Signed-off-by: Andy Lutomirski <luto at mit.edu>

Eric- I couldn't find any allocation of anything in
intel_init_clock_gating, so I think that running identical code on
load and resume should be fine.  This patch works on my GM45, but I
can't test on any other chips because I don't have any.

I'm not sure that this is the right thing to do in the non-KMS case,
but the existing code behaves similarly, so I didn't add any KMS

(For the record, I still have power consumption issues on my GM45
after suspend even with this patch.)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 57204e2..cae920d 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -372,8 +372,6 @@ typedef struct drm_i915_private {
 	u32 saveFDI_RXA_IMR;
 	u32 saveFDI_RXB_IMR;
 	u32 saveCACHE_MODE_0;
-	u32 saveD_STATE;
-	u32 saveDSPCLK_GATE_D;
 	u32 saveMI_ARB_STATE;
 	u32 saveSWF0[16];
 	u32 saveSWF1[16];
diff --git a/drivers/gpu/drm/i915/i915_suspend.c
index 992d561..9dd3ce5 100644
--- a/drivers/gpu/drm/i915/i915_suspend.c
+++ b/drivers/gpu/drm/i915/i915_suspend.c
@@ -28,6 +28,7 @@
 #include "drm.h"
 #include "i915_drm.h"
 #include "i915_drv.h"
+#include "intel_drv.h"

 static bool i915_pipe_enabled(struct drm_device *dev, enum pipe pipe)
@@ -720,10 +721,6 @@ int i915_save_state(struct drm_device *dev)
 		dev_priv->saveIMR = I915_READ(IMR);

-	/* Clock gating state */
-	dev_priv->saveD_STATE = I915_READ(D_STATE);
-	dev_priv->saveDSPCLK_GATE_D = I915_READ(DSPCLK_GATE_D); /* Not sure
about this */
 	/* Cache mode state */
 	dev_priv->saveCACHE_MODE_0 = I915_READ(CACHE_MODE_0);

@@ -796,8 +793,7 @@ int i915_restore_state(struct drm_device *dev)

 	/* Clock gating state */
-	I915_WRITE (D_STATE, dev_priv->saveD_STATE);
-	I915_WRITE (DSPCLK_GATE_D, dev_priv->saveDSPCLK_GATE_D);
+	intel_init_clock_gating(dev);

 	/* Cache mode state */
 	I915_WRITE (CACHE_MODE_0, dev_priv->saveCACHE_MODE_0 | 0xffff0000);
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index ef61fe9..7c7b3d3 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -177,6 +177,7 @@ extern void intel_crtc_fb_gamma_set(struct
drm_crtc *crtc, u16 red, u16 green,
 				    u16 blue, int regno);
 extern void intel_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red,
u16 *green,
 				    u16 *blue, int regno);
+extern void intel_init_clock_gating(struct drm_device *dev);

 extern int intel_framebuffer_create(struct drm_device *dev,
 				    struct drm_mode_fb_cmd *mode_cmd,

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