[Intel-gfx] [PATCH] mesa/intel: support tiled textures on pre-965

[Jesse Barnes]

On Sun, 09 Aug 2009 00:15:29 -0700
Eric Anholt <eric at anholt.net> wrote:
> > @@ -217,9 +218,11 @@ intel_alloc_renderbuffer_storage(GLcontext *
> > ctx, struct gl_renderbuffer *rb, DBG("Allocating %d x %d Intel RBO
> > (pitch %d)\n", width, height, pitch);
> >  
> > -      irb->region = intel_region_alloc(intel, I915_TILING_NONE,
> > -				       cpp, width, height, pitch,
> > -				       GL_TRUE);
> > +      if (intel->use_texture_tiling)
> > +	 tiling_mode = I915_TILING_X;
> > +
> > +      irb->region = intel_region_alloc(intel, tiling_mode, cpp,
> > width, height,
> > +				       pitch, GL_TRUE);
> >        if (!irb->region)
> >           return GL_FALSE;       /* out of memory? */
> 
> What if it's a format unsuited for X tiling (depth)?  We handle that
> in the texture code, and it should happen here as well.  Applies to
> the stuff below, too.
> 
> We should probably split these changes out and get them in on 965
> anyway.

Yeah, I'd like to push this out since I think it's useful for newer
platforms as well.  Looks like there's code to handle this in
intel_miptree_create?  I'll pull that bit out and use it in both places
(and wherever else I can find).

Thanks,
-- 
Jesse Barnes, Intel Open Source Technology Center