[Intel-gfx] [PATCH] drm/i915/pch: Use minimal number of FDI lanes (v2)

[Zhenyu Wang]

On 2010.04.12 11:38:44 -0400, Adam Jackson wrote:
> This should be a small power savings. Tested on Lenovo T410 (Ironlake), LVDS
> VGA and DisplayPort, up to 1920x1200R.
> 
> v2: Add Sandybridge support, fix obvious math error.

Tested on Sandybridge/CPT, no regression found, but didn't do
power saving evaluation yet.

thanks.

-- 
Open Source Technology Center, Intel ltd.

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