[Intel-gfx] [PATCH] i915: Modify for pineview lvds sync polarity

bfreed at chromium.org bfreed at chromium.org
Tue Dec 14 20:38:34 CET 2010


The i915 driver normally assumes the video bios has configured several 
of the LVDS panel registers, and it just inherits the values. If the 
vbios has not run, several of these will need to be setup. 

intel_display.c: ensures the sync polarity to the panel is correct
and issues a message if the driver changes it. 

If these are not correct then although the panel looks ok, output from an HDMI
encoder (eg, Chrontel CH7036) will be incorrect. 

Signed-off-by: Mark Hayter <mdhayter at chromium.org>

Index: drivers/gpu/drm/i915/i915_reg.h
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index b463a0baa924ff1dee74ca8473b458927cfa0901..e325eaea4bfb289c76a093c5cada026eab6c3983 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -1056,6 +1056,10 @@
 #define   LVDS_PIPEB_SELECT		(1 << 30)
 /* LVDS dithering flag on 965/g4x platform */
 #define   LVDS_ENABLE_DITHER		(1 << 25)
+/* LVDS sync polarity flags. Set to invert (i.e. negative) */
+#define   LVDS_VSYNC_POLARITY		(1 << 21)
+#define   LVDS_HSYNC_POLARITY		(1 << 20)
+
 /* Enable border for unscaled (or aspect-scaled) display */
 #define   LVDS_BORDER_ENABLE		(1 << 15)
 /*
Index: drivers/gpu/drm/i915/intel_display.c
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 787e6da01984a2c2296295359250cd436e0cf5fe..9893e53e394cc9140167b9884c05efd62c4f139c 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -3334,6 +3334,29 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc,
 					lvds &= ~LVDS_ENABLE_DITHER;
 			}
 		}
+		/* Only tested on pineview, should work on IS_9XX */
+		if (IS_PINEVIEW(dev)) {
+			/* Set sync polarity for case when vbios did not */
+			char curhs, curvs, newhs, newvs;
+			curhs = (lvds & LVDS_HSYNC_POLARITY) ? '-' : '+';
+			curvs = (lvds & LVDS_VSYNC_POLARITY) ? '-' : '+';
+			newhs = (adjusted_mode->flags & DRM_MODE_FLAG_NHSYNC) ?
+				'-' : '+';
+			newvs = (adjusted_mode->flags & DRM_MODE_FLAG_NVSYNC) ?
+				'-' : '+';
+			if ((newhs != curhs) || (newvs != curvs)) {
+				DRM_INFO("Change lvds panel from %chsync "
+					 "%cvsync to %chsync %cvsync\n",
+					 curhs, curvs, newhs, newvs);
+				/* Clear to both + polarity */
+				lvds &= ~(LVDS_HSYNC_POLARITY |
+					  LVDS_VSYNC_POLARITY);
+				if (newhs == '-')
+					lvds |= LVDS_HSYNC_POLARITY;
+				if (newvs == '-')
+					lvds |= LVDS_VSYNC_POLARITY;
+			}
+		}
 		I915_WRITE(lvds_reg, lvds);
 		I915_READ(lvds_reg);
 	}



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