[Intel-gfx] [PATCH] drm/i915: unconditionally unlock panel regs

Jesse Barnes jbarnes at virtuousgeek.org
Tue Dec 14 22:15:12 CET 2010


On Tue, 14 Dec 2010 20:45:14 +0000
Chris Wilson <chris at chris-wilson.co.uk> wrote:

> On Tue, 14 Dec 2010 12:17:59 -0800, Jesse Barnes <jbarnes at virtuousgeek.org> wrote:
> > In the panel_on function we skip everything if the panel is already
> > powered up.  However, if it's powered up but not unlocked, subsequent
> > register writes may fail.
> > 
> > So unlock the regs regardless of the panel state to allow other mode
> > setting programming to occur normally.
> 
> That looks to be consistent with other [ab]users of PP_CONTROL. Can you
> tidy up the function to remove the duplicate code afterwards?
> -Chris

Sure, her eyou go.

-- 
Jesse Barnes, Intel Open Source Technology Center

From 78b4ed4faf42b62de6d8a23dda8120c410488c82 Mon Sep 17 00:00:00 2001
From: Jesse Barnes <jbarnes at virtuousgeek.org>
Date: Tue, 14 Dec 2010 13:14:07 -0800
Subject: [PATCH] drm/i915: unconditionally unlock panel regs

In the panel_on function we skip everything if the panel is already
powered up.  However, if it's powered up but not unlocked, subsequent
register writes may fail.

So unlock the regs regardless of the panel state to allow other mode
setting programming to occur normally.

[Still waiting to hear from bug reporters & testers on this one, but
it does get my Vaio working again, with or without the eDP VBT patch
reverted.]

Signed-off-by: Jesse Barnes <jbarnes at virtuousgeek.org>
---
 drivers/gpu/drm/i915/intel_dp.c |   10 +++++++---
 1 files changed, 7 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index f74a706..ddfd585 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -818,17 +818,21 @@ static bool ironlake_edp_panel_on (struct intel_dp *intel_dp)
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	u32 pp, idle_on_mask = PP_ON | PP_SEQUENCE_STATE_ON_IDLE;
 
+	/* Always unlock the protected regs so other writes work */
+	pp = I915_READ(PCH_PP_CONTROL);
+	pp |= PANEL_UNLOCK_REGS;
+	I915_WRITE(PCH_PP_CONTROL, pp);
+	POSTING_READ(PCH_PP_CONTROL);
+
 	if (I915_READ(PCH_PP_STATUS) & PP_ON)
 		return true;
 
-	pp = I915_READ(PCH_PP_CONTROL);
-
 	/* ILK workaround: disable reset around power sequence */
 	pp &= ~PANEL_POWER_RESET;
 	I915_WRITE(PCH_PP_CONTROL, pp);
 	POSTING_READ(PCH_PP_CONTROL);
 
-	pp |= PANEL_UNLOCK_REGS | POWER_TARGET_ON;
+	pp |= POWER_TARGET_ON;
 	I915_WRITE(PCH_PP_CONTROL, pp);
 	POSTING_READ(PCH_PP_CONTROL);
 
-- 
1.7.0.4




More information about the Intel-gfx mailing list