[Intel-gfx] [PATCH] drm/i915: disable rc6 on Cantiga and Crestline

[Jesse Barnes]

On Sat, 25 Dec 2010 12:37:52 +0000
Chris Wilson <chris at chris-wilson.co.uk> wrote:

> On Fri, 24 Dec 2010 20:29:34 -0800, Jesse Barnes <jbarnes at virtuousgeek.org> wrote:
> > The Ironlake code won't work on these old chips, so disable it to avoid
> > hanging older systems.
> 
> But AFAICS, pwrctxa is enabled for crestline/cantiga. Any info on whether
> that's true?

Looking at this some more, we don't have a way of checking whether
we're in RC6 on Cantiga.  All the regs appear to be programmed
correctly to allow it, but the bits indicating current RS state on
Ironlake are undefined on Cantiga (and read as 0 on my system).

Running the MI_SET_CONTEXT code on Cantiga results in a hang.  I don't
know why though, even after removing the MI_SUSPEND_FLUSH instructions
(which is only available on ILK+) and reducing the command count it
hangs at load.

Without getting that working and measuring the before/after power, I
don't think we can safely enable RC6 on anything before Ironlake.

-- 
Jesse Barnes, Intel Open Source Technology Center